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參數(shù)資料
| 型號： | GS4911BCNE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| 中文描述： | 高清/標(biāo)清/圖形時鐘和定時發(fā)生器鎖相 |
| 文件頁數(shù)： | 94/113頁 |
| 文件大?。?/td> | 1017K |
| 代理商： | GS4911BCNE3 |
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GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
94 of 113
Output_Select_5
47h
15-5
Reserved. Set these bits to zero when writing to 47h.
–
–
47h
4
Current_5 - selects the current drive capability of the
TIMING_OUT_5 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference:
Section 3.8.4 on page 71
R/W
0
47h
3-0
This register is used to select one of the 10
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_5 pin. See
Table 3-11
for more details.
Note: The default setting of this register is 0101b, which
corresponds to F Sync.
Reference:
Section 3.8.4 on page 71
R/W
0101b
Output_Select_6
48h
15-5
Reserved. Set these bits to zero when writing to 48h.
–
–
48h
4
Current_6 - selects the current drive capability of the
TIMING_OUT_6 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference:
Section 3.8.4 on page 71
R/W
0
48h
3-0
This register is used to select one of the 10
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_6 pin. See
Table 3-11
for more details.
Note: The default setting of this register is 0110b, which
corresponds to F Digital.
Reference:
Section 3.8.4 on page 71
R/W
0110b
Output_Select_7
49h
15-5
Reserved. Set these bits to zero when writing to 49h.
–
–
49h
4
Current_7 - selects the current drive capability of the
TIMING_OUT_7 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference:
Section 3.8.4 on page 71
R/W
0
49h
3-0
This register is used to select one of the 10
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_7 pin. See
Table 3-11
for more details.
Note: The default setting of this register is 0111b, which
corresponds to 10FID.
Reference:
Section 3.8.4 on page 71
R/W
0111b
Output_Select_8
4Ah
15-5
Reserved. Set these bits to zero when writing to 4Ah.
–
–
4Ah
4
Current_8 - selects the current drive capability of the
TIMING_OUT_8 pin. Set this bit HIGH for high current
drive. Otherwise, the current drive will be low.
Reference:
Section 3.8.4 on page 71
R/W
0
4Ah
3-0
This register is used to select one of the 10
pre-programmed or 4 user programmed timing signals
available for output on the TIMING_OUT_8 pin. See
Table 3-11
for more details.
Note: The default setting of this register is 1000b, which
corresponds to Display Enable (DE).
Reference:
Section 3.8.4 on page 71
R/W
1000b
Table 3-13: Configuration and Status Registers (Continued)
Register Name
Address
Bit
Description
R/W
Default
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| GS4915 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:ClockCleaner |
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| GS4915-INE3 | 功能描述:IC CLK JITTER CLEANR 40QFN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:ClockCleaner™ 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
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