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參數(shù)資料
| 型號(hào)： | GS4911BCNE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| 中文描述： | 高清/標(biāo)清/圖形時(shí)鐘和定時(shí)發(fā)生器鎖相 |
| 文件頁數(shù)： | 73/113頁 |
| 文件大?。?/td> | 1017K |
| 代理商： | GS4911BCNE3 |
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GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
73 of 113
Example 2: Programming an output video clock of 74.175824MHz (74.25/1.001):
Therefore, program N
v
= 250 and D
v
= 91.
NOTE: The Nv and Dv values programmed in registers 20h-21h and 22h-23h are
not held until the custom video clock update bit (6) of register 16h is toggled.
3.9.2 Programming a Custom Audio Clock (GS4911B only)
The GS4911B’s audio clocks are derived from the fundamental audio sampling
frequency initially set by ASR_SEL[2:0]. At any time this fundamental sampling
frequency may be modified to create a custom output audio clock.
The user may generate any audio sampling frequency between 6.6kHz and 96kHz,
and therefore create a custom audio clock as high as 512*96kHz. When generating
a custom audio sampling frequency, ASR_SEL[2:0] must be set to 100b and bit 5
of register 31h (enable_384fs) must be kept LOW.
The fundamental sampling frequency is determined using a ratio based on the
27MHz reference. Therefore, to program a custom audio clock, the user must
calculate and program the set of integers (N
a
, D
a
) in the equation:
where:
f
s
= desired fundamental audio sampling frequency
f
in
= 27MHz crystal reference
N
a
= numerator of the ratio (host register 33h-34h)
D
a
= denominator of the ratio (host register 35h-36h)
Before programming N
a
and D
a
, the numerator and denominator must be reduced
to their lowest factors.
For example, to program a fundamental audio sampling frequency of 42kHz:
Therefore, program N
a
= 1792 and D
a
= 1125 and toggle the custom audio clock
update bit (6) of register 31h. Using registers 3Fh to 41h, the custom audio
sampling frequency generated may then be multiplied by a factor of 64, 128, 256,
or 512 before being presented to the ACLK pins.
NOTE: The AFS reset described in
Section 3.7.2 on page 63
will always remain
active.
f
f
in
--------
27
MHz
74.25
MHz
1.001
=
N
v
D
v
------
∴
2700
1000
1001
×
×
7425
91
250
=
=
N
a
D
a
------
1024
f
s
f
in
-----
×
=
N
a
D
a
------
1024
27000000
---42000
×
27000
43008
1125
1792
=
=
=
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