參數(shù)資料
型號(hào): DS21554LN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 79/117頁
文件大?。?/td> 698K
代理商: DS21554LN
DS21354 & DS21554
64 of 117
SYMBOL
POSITION NAME AND DESCRIPTION
RHALF
HSR.4
Receive FIFO Half Full. Set when the receive 64–byte FIFO fills beyond
the half way point. The setting of this bit prompts the user to read the
RHIR register for details.
RNE
HSR.3
Receive FIFO Not Empty. Set when the receive 64–byte FIFO has at
least one byte available for a read. The setting of this bit prompts the user
to read the RHIR register for details.
THALF
HSR.2
Transmit FIFO Half Empty. Set when the transmit 64–byte FIFO
empties beyond the half way point. The setting of this bit prompts the user
to read the THIR register for details.
TNF
HSR.1
Transmit FIFO Not Full. Set when the transmit 64–byte FIFO has at
least one byte available. The setting of this bit prompts the user to read the
THIR register for details.
TMEND
HSR.0
Transmit Message End. Set when the transmit HDLC controller has
finished sending a message. The setting of this bit prompts the user to read
the THIR register for details.
NOTE:
The RPE, RPS, and TMEND bits are latched and will be cleared when read.
HIMR: HDLC INTERRUPT MASK REGISTER (Address=B2 Hex)
(MSB)
(LSB)
FRCL
RPE
RPS
RHALF
RNE
THALF
TNF
TMEND
SYMBOL
POSITION NAME AND DESCRIPTION
FRCL
HIMR.7
Framer Receive Carrier Loss.
0 = interrupt masked
1 = interrupt enabled
RPE
HIMR.6
Receive Packet End.
0 = interrupt masked
1 = interrupt enabled
RPS
HIMR.5
Receive Packet Start.
0 = interrupt masked
1 = interrupt enabled
RHALF
HIMR.4
Receive FIFO Half Full.
0 = interrupt masked
1 = interrupt enabled
RNE
HIMR.3
Receive FIFO Not Empty.
0 = interrupt masked
1 = interrupt enabled
THALF
HIMR.2
Transmit FIFO Half Empty.
0 = interrupt masked
1 = interrupt enabled
TNF
HIMR.1
Transmit FIFO Not Full.
0 = interrupt masked
1 = interrupt enabled
相關(guān)PDF資料
PDF描述
DS2155G DATACOM, FRAMER, PBGA100
DS21600SN PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
DS21600N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
DS2155LN DATACOM, FRAMER, PQFP100
DS21602N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
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