參數(shù)資料
型號: DS21554LN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 43/117頁
文件大小: 698K
代理商: DS21554LN
DS21354 & DS21554
31 of 117
SYMBOL
POSITION NAME AND DESCRIPTION
RCR1.3
Not Assigned. Should be set to zero when written.
FRC
RCR1.2
Frame Resync Criteria.
0 = resync if FAS received in error 3 consecutive times
1 = resync if FAS or bit 2 of non–FAS is received in error 3 consecutive
times
SYNCE
RCR1.1
Sync Enable.
0 = auto resync enabled
1 = auto resync disabled
RESYNC
RCR1.0
Resync. When toggled from low to high, a resync is initiated. Must be
cleared and set again for a subsequent resync.
6.1.1 Synchronization and Re-synchronization
Once synchronization is accomplished there are certain criteria that can cause a re-synchronization.
These criteria are detailed in Table 6-2. Also see Figure 19-14 for a flow chart of the synchronization
process.
SYNC/RESYNC CRITERIA Table 6-2
FRAME OR
MULTIFRAME
LEVEL
SYNC CRITERIA
RESYNC CRITERIA
ITU SPEC.
FAS
FAS present in frame N
and N + 2, and FAS not
present in frame N + 1
Three consecutive incorrect FAS
received
Alternate (RCR1.2=1) the above
criteria is met or three
consecutive incorrect bit 2 of
non–FAS received
G.706
4.1.1
4.1.2
CRC4
Two valid MF alignment
words found within 8 ms
915 or more CRC4 code words
out of 1000 received in error
G.706
4.2 and 4.3.2
CAS
Valid MF alignment word
found and previous
timeslot 16 contains code
other than all zeros
Two consecutive MF alignment
words received in error
G.732 5.2
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