參數(shù)資料
型號(hào)： DS21554LN
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Interface
英文描述： DATACOM, PCM TRANSCEIVER, PQFP100
封裝： 14 X 14 MM, LQFP-100
文件頁(yè)數(shù)： 63/117頁(yè)
文件大小： 698K
代理商： DS21554LN
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DS21354 & DS21554
5 of 117
1 LIST OF FIGURES
Figure 3-1
DS2135/554 BLOCK DIAGRAM ................................................................................ 10
Figure 16-1
BASIC EXTERNAL ANALOG CONNECTIONS ...................................................... 71
Figure 16-2
OPTIONAL CRYSTAL CONNECTION..................................................................... 72
Figure 16-3
JITTER TOLERANCE ................................................................................................. 72
Figure 16-4
JITTER ATTENUATION............................................................................................. 73
Figure 16-5
TRANSMIT WAVEFORM TEMPLATE .................................................................... 73
Figure 16-6
PROTECTED INTERFACE EXAMPLE FOR THE DS21554 ................................... 74
Figure 16-7
PROTECTED INTERFACE EXAMPLE FOR THE DS21354 ................................... 75
Figure 16-8
TYPICAL MONITOR PORT APPLICATION ............................................................ 76
Figure 17-1
JTAG FUNCTIONAL BLOCK DIAGRAM ................................................................ 78
Figure 17-2
TAP CONTROLLER STATE DIAGRAM................................................................... 81
Figure 18-1
IBO BASIC CONFIGURATION USING 4 SCTS....................................................... 87
Figure 19-1
RECEIVE SIDE TIMING............................................................................................. 88
Figure 19-2
RECEIVE SIDE BOUNDARY TIMING (with elastic store disabled) ........................ 89
Figure 19-3
RECEIVE SIDE 1.544 MHz BOUNDARY TIMING (with elastic store enabled)...... 90
Figure 19-4
RECEIVE SIDE 2.048 MHz BOUNDARY TIMING (with elastic store enabled)..... 91
Figure 19-5
RECEIVE SIDE INTERLEAVE BUS OPERATION, BYTE MODE......................... 92
Figure 19-6
RECEIVE SIDE INTERLEAVE BUS OPERATION, FRAME MODE ..................... 93
Figure 19-7
TRANSMIT SIDE TIMING ......................................................................................... 94
Figure 19-8
TRANSMIT SIDE BOUNDARY TIMING (with elastic store disabled)..................... 95
Figure 19-9
TRANSMIT SIDE 1.544 MHz BOUNDARY TIMING (with elastic store enabled) ......... 96
Figure 19-10
TRANSMIT SIDE 2.048 MHz BOUNDARY TIMING (with elastic store enabled) ......... 97
Figure 19-11
TRANSMIT SIDE INTERLEAVE BUS OPERATIONS, BYTE MODE ................... 98
Figure 19-12
TRANSMIT SIDE INTERLEAVE BUS OPERATIONS, FRAME MODE................ 99
Figure 19-13
G.802 TIMING............................................................................................................ 100
Figure 19-14
DS21354/554 FRAMER SYNCHRONIZATION FLOWCHART ............................ 101
Figure 19-15
DS21354/554 TRANSMIT DATA FLOW ................................................................. 102
Figure 21-1
INTEL BUS READ AC TIMING (BTS=0 / MUX=1)............................................... 105
Figure 21-2
INTEL BUS WRITE TIMING (BTS=0 / MUX=1)................................................... 105
Figure 21-3
MOTOROLA BUS AC TIMING (BTS=1 / MUX=1)................................................ 106
Figure 21-4
INTEL BUS READ AC TIMING (BTS=0 / MUX=0)............................................... 108
Figure 21-5
INTEL BUS WRITE AC TIMING (BTS=0 / MUX=0) ............................................. 108
Figure 21-6
MOTOROLA BUS READ AC TIMING (BTS=1 / MUX=0).................................... 109
Figure 21-7
MOTOROLA BUS WRITE AC TIMING (BTS=1 / MUX=0) .................................. 109
Figure 21-8
RECEIVE SIDE AC TIMING .................................................................................... 111
Figure 21-9
RECEIVE SYSTEM SIDE AC TIMING.................................................................... 112
Figure 21-10
RECEIVE LINE INTERFACE AC TIMING ............................................................. 113
Figure 21-11
TRANSMIT SIDE AC TIMING................................................................................. 115
Figure 21-12
TRANSMIT SYSTEM SIDE AC TIMING ................................................................ 116
Figure 21-13
TRANSMIT LINE INTERFACE SIDE AC TIMING................................................ 116
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21554LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2155DK 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS2155G 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2155G/T&R 制造商:Maxim Integrated Products 功能描述:DS2155 T1/E1/J1 SCT 100P CSBGA T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LIU T1/E1/J1 SCT 100P CSBGA 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs T1/E1/J1 Transceiver
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