參數(shù)資料
型號: DS21554LN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 45/117頁
文件大?。?/td> 698K
代理商: DS21554LN
DS21354 & DS21554
33 of 117
SYMBOL
POSITION NAME AND DESCRIPTION
TSiS
TCR1.3
Transmit International Bit Select.
0 = sample Si bits at TSER pin
1 = source Si bits from TAF and TNAF registers (in this mode, TCR1.6
must be set to 0)
TSA1
TCR1.2
Transmit Signaling All Ones.
0 = normal operation
1 = force timeslot 16 in every frame to all ones
TSM
TCR1.1
TSYNC Mode Select.
0 = frame mode (see the timing in Section 19.2)
1 = CAS and CRC4 multiframe mode (see the timing in Section 19.2)
TSIO
TCR1.0
TSYNC I/O Select.
0 = TSYNC is an input
1 = TSYNC is an output
NOTE:
See Figure 19-15 for more details about how the Transmit Control Registers affect the operation of the
DS21354/554.
TCR2: TRANSMIT CONTROL REGISTER 2 (Address=13 Hex)
(MSB)
(LSB)
Sa8S
Sa7S
Sa6S
Sa5S
Sa4S
ODM
AEBE
PF
SYMBOL
POSITION NAME AND DESCRIPTION
Sa8S
TCR2.7
Sa8 Bit Select. Set to one to source the Sa8 bit from the TLINK pin; set
to zero to not source the Sa8 bit. See Section 19.2 for timing details.
Sa7S
TCR2.6
Sa7 Bit Select. Set to one to source the Sa7 bit from the TLINK pin; set
to zero to not source the Sa7 bit. See Section 19.2 for timing details.
Sa6S
TCR2.5
Sa6 Bit Select. Set to one to source the Sa6 bit from the TLINK pin; set
to zero to not source the Sa6 bit. See Section 19.2 for timing details.
Sa5S
TCR2.4
Sa5 Bit Select. Set to one to source the Sa5 bit from the TLINK pin; set
to zero to not source the Sa5 bit. See Section 19.2 for timing details.
Sa4S
TCR2.3
Sa4 Bit Select. Set to one to source the Sa4 bit from the TLINK pin; set
to zero to not source the Sa4 bit. See Section 19.2 for timing details.
ODM
TCR2.2
Output Data Mode.
0 = pulses at TPOSO and TNEGO are one full TCLKO period wide
1 = pulses at TPOSO and TNEGO are 1/2 TCLKO period wide
AEBE
TCR2.1
Automatic E–Bit Enable.
0 = E–bits not automatically set in the transmit direction
1 = E–bits automatically set in the transmit direction
PF
TCR2.0
Function of RLOS/LOTC Pin.
0 = Receive Loss of Sync (RLOS)
1 = Loss of Transmit Clock (LOTC)
相關(guān)PDF資料
PDF描述
DS2155G DATACOM, FRAMER, PBGA100
DS21600SN PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
DS21600N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
DS2155LN DATACOM, FRAMER, PQFP100
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