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參數(shù)資料
| 型號： | DS21554LN |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Interface |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封裝： | 14 X 14 MM, LQFP-100 |
| 文件頁數(shù)： | 28/117頁 |
| 文件大?。?/td> | 698K |
| 代理商： | DS21554LN |
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DS21354 & DS21554
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4.1.2 Receive Side Pins
Signal Name:
RLINK
Signal Description:
Receive Link Data
Signal Type:
Output
Updated with the full recovered E1 data stream on the rising edge of RCLK.
Signal Name:
RLCLK
Signal Description:
Receive Link Clock
Signal Type:
Output
4 kHz to 20 kHz clock (Sa bits) for the RLINK output. See Section 15 for details.
Signal Name:
RCLK
Signal Description:
Receive Clock
Signal Type:
Output
2.048 MHz clock that is used to clock data through the receive side framer.
Signal Name:
RCHCLK
Signal Description:
Receive Channel Clock
Signal Type:
Output
A 256 kHz clock which pulses high during the LSB of each channel. Synchronous with RCLK when the
receive side elastic store is disabled. Synchronous with RSYSCLK when the receive side elastic store is
enabled. Useful for parallel to serial conversion of channel data.
Signal Name:
RCHBLK
Signal Description:
Receive Channel Block
Signal Type:
Output
A user programmable output that can be forced high or low during any of the 32 E1 channels.
Synchronous with RCLK when the receive side elastic store is disabled. Synchronous with RSYSCLK
when the receive side elastic store is enabled. Useful for blocking clocks to a serial UART or LAPD
controller in applications where not all E1 channels are used such as Fractional E1, 384 kbps service, 768
kbps, or ISDN–PRI. Also useful for locating individual channels in drop–and–insert applications, for
external per–channel loopback, and for per–channel conditioning. See Section 12 for details.
Signal Name:
RSER
Signal Description:
Receive Serial Data
Signal Type:
Output
Received NRZ serial data. Updated on rising edges of RCLK when the receive side elastic store is
disabled. Updated on the rising edges of RSYSCLK when the receive side elastic store is enabled.
Signal Name:
RSYNC
Signal Description:
Receive Sync
Signal Type:
Input/Output
An extracted pulse, one RCLK wide, is output at this pin which identifies either frame or CAS/CRC
multiframe boundaries. If the receive side elastic store is enabled, then this pin can be enabled to be an
input at which a frame or multiframe boundary pulse synchronous with RSYSCLK is applied.
相關PDF資料 |
PDF描述 |
|---|---|
| DS2155G | DATACOM, FRAMER, PBGA100 |
| DS21600SN | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| DS21600N | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8 |
| DS2155LN | DATACOM, FRAMER, PQFP100 |
| DS21602N | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS21554LN+ | 功能描述:網(wǎng)絡控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2155DK | 功能描述:網(wǎng)絡開發(fā)工具 RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS2155G | 功能描述:網(wǎng)絡控制器與處理器 IC T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2155G/T&R | 制造商:Maxim Integrated Products 功能描述:DS2155 T1/E1/J1 SCT 100P CSBGA T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LIU T1/E1/J1 SCT 100P CSBGA 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs T1/E1/J1 Transceiver |
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