參數(shù)資料
型號: DS21554LN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 32/117頁
文件大?。?/td> 698K
代理商: DS21554LN
DS21354 & DS21554
21 of 117
Signal Name:
FMS
Signal Description:
Framer Mode Select
Signal Type:
Input
Selects the DS2154 mode when high or the DS21354/554 mode when low. If high, the JTRST* is
internally pulled low. If low, JTRST* has normal JTAG functionality. This pin has a 10k pull up
resistor.
Signal Name:
Test
Signal Description:
3–State Control
Signal Type:
Input
Set high to 3–state all output and I/O pins (including the parallel control port). Set low for normal
operation. Useful in board level testing.
Signal Name:
MUX
Signal Description:
Bus Operation
Signal Type:
Input
Set low to select non–multiplexed bus operation. Set high to select multiplexed bus operation.
Signal Name:
AD0 to AD7
Signal Description:
Data Bus [D0 to D7] or Address/Data Bus
Signal Type:
Input
In non–multiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation (MUX
= 1), serves as a 8–bit multiplexed address / data bus.
Signal Name:
A0 to A6
Signal Description:
Address Bus
Signal Type:
Input
In non–multiplexed bus operation (MUX = 0), serves as the address bus. In multiplexed bus operation
(MUX = 1), these pins are not used and should be tied low.
Signal Name:
BTS
Signal Description:
Bus Type Select
Signal Type:
Input
Strap high to select Motorola bus timing; strap low to select Intel bus timing. This pin controls the
function of the RD*(DS*), ALE(AS), and WR*(R/W*) pins. If BTS = 1, then these pins assume the
function listed in parenthesis ().
Signal Name:
RD*(DS*)
Signal Description:
Read Input - Data Strobe
Signal Type:
Input
RD* and DS* are active low signals. DS active HIGH when MUX = 1. See bus timing diagrams.
Signal Name:
CS*
Signal Description:
Chip Select
Signal Type:
Input
Must be low to read or write to the device. CS* is an active low signal.
相關PDF資料
PDF描述
DS2155G DATACOM, FRAMER, PBGA100
DS21600SN PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
DS21600N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
DS2155LN DATACOM, FRAMER, PQFP100
DS21602N PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP8
相關代理商/技術參數(shù)
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