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參數(shù)資料
| 型號： | SCD243110QCD |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 134.4K bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封裝： | METRIC, QFP-100 |
| 文件頁數(shù)： | 166/186頁 |
| 文件大?。?/td> | 2204K |
| 代理商： | SCD243110QCD |
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CD2431 — Advanced Multi-Protocol Communications Controller
80
Datasheet
6.5.7
UNIX Support Features
The COR6 provides several functions useful for UNIX TTY drivers, to further reduce the amount
of character-by-character processing that the CPU is required to perform. Separate receive and
transmit bits are provided to perform CR/NL (carriage return/new line) translations. In transmit,
NL can be converted to CR NL or CR converted to NL. In receive, CR can be discarded, NL
converted to CR, or CR converted to NL.
In receive processing, separate modes are provided to handle break conditions and character error
conditions. Break conditions can be handled in the normal way (by a receive status interrupt), the
condition can be discarded, or the break can be translated to a NULL (00) and passed as normal
data to the CPU. Parity and framing errors can either be handled as normal (by receive status
interrupts), discarded, translated to a NULL (00) and passed to the CPU as normal data, or the
character can be passed to the CPU as normal data preceded by the sequence FF 00.
The LNext option (COR7[6]) provides a mechanism to transfer flow control and other special
characters without invoking flow control or special character interrupts at the receiver. If the LNext
option is enabled when the LNext character is received, the following character is just passed to the
CPU as a normal character. The LNext character is programmed by the LNext register. The ‘Strip’
feature (COR7[7]) strips the eighth bit off each error-free received character. This has no effect on
the transmitted data. The flowchart in Figure 19 shows the exact order of the CD2431 character
processing steps.
6.6
Non-8-Bit Data Transfers
In Asynchronous mode, it is possible to transmit and receive less than 8 bits per character. There
can be 5, 6, 7, or 8 bits per character.
For HDLC mode, there are always 8 bits per character transmitted. The CD2431 transmits only
byte-aligned frames. The CD2431 receives HDLC frames using transfers of 8 bits per character,
except for the last character received before the FCS. If this last character is not aligned to an 8-bit
boundary, the ResInd (Residual Indication) bit is set, along with the EOF bit in RISR.
Table 14. SCdet[x] Settings
SCdet2
SCdet1
SCdet0
Function
00
0
No special characters/range
detected
0
1
Special character 1 matched
0
1
0
Special character 2 matched
01
1
Special character 3 matched if
character 1 and 3 sequence not
enabled
10
0
Special character 4 matched if
character 2 and 4 sequence not
enabled
11
1
The hex value of the receive
character is within the range
SCRl
≤ receive character ≤
SCRh.
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