
5 ADVANCED TECHNIQUES
SID13705 PROGRAMMING NOTES
EPSON
C-2-21
AND EXAMPLES
2. After vertical size lines have been displayed the system will begin displaying data from the
memory area pointed to by Screen 2 Display Start Address.
On thing that must be pointed out here is that Screen 1 memory is always displayed at the top of
the screen followed by screen 2 memory. This relationship holds true regardless of where in
display memory Screen 1 Start Address and Screen 2 Start Address are pointing. For instance,
Screen 2 Start Address may point to offset zero of display memory while Screen 1 Start Address
points to a location several thousand bytes higher. Screen 1 will still be shown first on the display.
While not particularly useful, it is even possible to set screen 1 and screen 2 to the same address.
Screen 2 Start Address Registers
These two registers form the sixteen bit Screen 2 Start Address. Screen 2 is always displayed
immediately following the screen 1 data and will begin at the left-most pixel on a line. Keep in
mind that if the Screen 1 Vertical Size is equal to or greater than the physical display then Screen 2
will not be shown.
In landscape mode these registers form the word offset to the first byte in display memory to be
displayed. Changing these registers by one will shift the display image 2 to 16 pixels, depending
on the current color depth.
The SID13705 block does not support split screen operation in portrait mode. Screen 2 will never
be used if portrait mode is selected.
Refer to Table 5-1 to see the minimum number of pixels affected by a change of one to these
registers
Screen 1 Start Address registers, REG[0C], REG[0D] and REG[10] are discussed in “Section” on
page C-2-17.
REG[0Eh] Screen 2 Display Start Address 0 (LSB)
Start Addr
Bit 7
Start Addr
Bit 6
Start Addr
Bit 5
Start Addr
Bit 4
Start Addr
Bit 3
Start Addr
Bit 2
Start Addr
Bit 1
Start Addr
Bit 0
REG[0Fh] Screen 2 Display Start Address 1 (MSB)
Start Addr
Bit 15
Start Addr
Bit 14
Start Addr
Bit 13
Start Addr
Bit 12
Start Addr
Bit 11
Start Addr
Bit 10
Start Addr
Bit 9
Start Addr
Bit 8