
1
OUTLINE
S1C33L01 PRODUCT PART
EPSON
A-7
Pin name
Pin No.
I/O
Pull-up
Function
P04
SIN1
#DMAACK2
147
I/O
–
P04:
I/O port when CFP04(D4/0x402D0) = "0" and CFEX4(D4/0x402DF) = "0"
(default)
SIN1:
Serial I/F Ch. 1 data input when CFP04(D4/0x402D0) = "1"
and CFEX4(D4/0x402DF) = "0"
#DMAACK2: HSDMA Ch. 2 acknowledge output when CFEX4(D4/0x402DF) = "1"
P06
#SCLK1
#DMAACK3
145
I/O
–
P06:
I/O port when CFP06(D6/0x402D0) = "0" and CFEX6(D6/0x402DF) = "0"
(default)
#SCLK1:
Serial I/F Ch. 1 clock input/output when CFP06(D6/0x402D0) = "1"
and CFEX6(D6/0x402DF) = "0"
#DMAACK3: HSDMA Ch. 3 acknowledge output when CFEX6(D6/0x402DF) = "1"
P15
EXCL4
#DMAEND0
136
I/O
–
P15:
I/O port when CFP15(D5/0x402D4) = "0" (default)
EXCL4:
16-bit timer 4 event counter input when CFP15(D5/0x402D4) = "1"
and IOC15(D5/0x402D6) = "0"
#DMAEND0: HSDMA Ch. 0 end-of-transfer signal output when CFP15(D5/0x402D4) = "1"
and IOC15(D5/0x402D6) = "1"
P16
EXCL5
#DMAEND1
135
I/O
–
P16:
I/O port when CFP16(D6/0x402D4) = "0" (default)
EXCL5:
16-bit timer 5 event counter input when CFP16(D6/0x402D4) = "1"
and IOC16(D6/0x402D6) = "0"
#DMAEND1: HSDMA Ch. 1 end-of-transfer signal output when CFP16(D6/0x402D4) =
"1"
and IOC16(D6/0x402D6) = "1"
P05
SOUT1
#DMAEND2
146
I/O
–
P05:
I/O port when CFP05(D5/0x402D0) = "0" and CFEX5(D5/0x402DF) = "0"
(default)
SOUT1:
Serial I/F Ch. 1 data output when CFP05(D5/0x402D0) = "1"
and CFEX5(D5/0x402DF) = "0"
#DMAEND2: HSDMA Ch. 2 end-of-transfer signal output when CFEX5(D5/0x402DF) =
"1"
P07
#SRDY1
#DMAEND3
144
I/O
–
P07:
I/O port when CFP07(D7/0x402D0) = "0" and CFEX7(D7/0x402DF) = "0"
(default)
#SRDY1:
Serial I/F Ch. 1 ready signal output when CFP07(D7/0x402D0) = "1"
and CFEX5(D5/0x402DF) = "0"
#DMAEND3: HSDMA Ch. 3 end-of-transfer signal output when CFEX7(D7/0x402DF) =
"1"
Table 1.3.4
List of Pins for Internal Peripheral Circuits
Pin name
Pin No.
I/O
Pull-up
Function
K52
#ADTRG
71
I
With
pull-up
K52:
Input port when CFK52(D2/0x402C0) = "0" (default)
#ADTRG:
A/D converter trigger input when CFK52(D2/0x402C0) = "1"
K60
AD0
68
I
–
K60:
Input port when CFK60(D0/0x402C3) = "0" (default)
AD0:
A/D converter Ch. 0 input when CFK60(D0/0x402C3) = "1"
K61
AD1
67
I
–
K61:
Input port when CFK61(D1/0x402C3) = "0" (default)
AD1:
A/D converter Ch. 1 input when CFK61(D1/0x402C3) = "1"
K62
AD2
65
I
–
K62:
Input port when CFK62(D2/0x402C3) = "0" (default)
AD2:
A/D converter Ch. 2 input when CFK62(D2/0x402C3) = "1"
K63
AD3
64
I
–
K63:
Input port when CFK63(D3/0x402C3) = "0" (default)
AD3:
A/D converter Ch. 3 input when CFK63(D3/0x402C3) = "1"
K64
AD4
63
I
–
K64:
Input port when CFK64(D4/0x402C3) = "0" (default)
AD4:
A/D converter Ch. 4 input when CFK64(D4/0x402C3) = "1"
K65
AD5
61
I
–
K65:
Input port when CFK65(D5/0x402C3) = "0" (default)
AD5:
A/D converter Ch. 5 input when CFK65(D5/0x402C3) = "1"
K66
AD6
60
I
–
K66:
Input port when CFK66(D6/0x402C3) = "0" (default)
AD6:
A/D converter Ch. 6 input when CFK60(D6/0x402C3) = "1"
K67
AD7
59
I
–
K67:
Input port when CFK67(D7/0x402C3) = "0" (default)
AD7:
A/D converter Ch. 7 input when CFK67(D7/0x402C3) = "1"
P00
SIN0
155
I/O
–
P00:
I/O port when CFP00(D0/0x402D0) = "0" (default)
SIN0:
Serial I/F Ch. 0 data input when CFP00(D0/0x402D0) = "1"
P01
SOUT0
154
I/O
–
P01:
I/O port when CFP01(D1/0x402D0) = "0" (default)
SOUT0:
Serial I/F Ch. 0 data output when CFP01(D1/0x402D0) = "1"
P02
#SCLK0
153
I/O
–
P02:
I/O port when CFP02(D2/0x402D0) = "0" (default)
#SCLK0:
Serial I/F Ch. 0 clock input/output when CFP02(D2/0x402D0) = "1"
P03
#SRDY0
152
I/O
–
P03:
I/O port when CFP03(D3/0x402D0) = "0" (default)
#SRDY0:
Serial I/F Ch. 0 ready signal output when CFP03(D3/0x402D0) = "1"