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參數(shù)資料
| 型號： | NAND01GW3B2CN1E |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 128M X 8 FLASH 3V PROM, 25000 ns, PDSO48 |
| 封裝： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件頁數(shù)： | 6/65頁 |
| 文件大小： | 1473K |
| 代理商： | NAND01GW3B2CN1E |
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Signal descriptions
NAND01G-B2C
3
Signal descriptions
See Figure 2: Logic diagram, and Table 3: Signal names, for a brief overview of the signals
connected to this device.
3.1
Inputs/outputs (I/O0-I/O7)
Input/outputs 0 to 7 are used to input the selected address, output the data during a read
operation or input a command or data during a write operation. The inputs are latched on
the rising edge of Write Enable. I/O0-I/O7 are left floating when the device is deselected or
the outputs are disabled.
3.2
Inputs/outputs (I/O8-I/O15)
Input/outputs 8 to 15 are only available in x16 devices. They are used to output the data
during a read operation or input data during a write operation. Command and address
inputs only require I/O0 to I/O7.
The inputs are latched on the rising edge of Write Enable. I/O8-I/O15 are left floating when
the device is deselected or the outputs are disabled.
3.3
Address Latch Enable (AL)
The Address Latch Enable activates the latching of the address inputs in the command
interface. When AL is High, the inputs are latched on the rising edge of Write Enable.
3.4
Command Latch Enable (CL)
The Command Latch Enable activates the latching of the command inputs in the command
interface. When CL is High, the inputs are latched on the rising edge of Write Enable.
3.5
Chip Enable (E)
The Chip Enable input activates the memory control logic, input buffers, decoders and
sense amplifiers. When Chip Enable is Low, VIL, the device is selected. If Chip Enable goes
High, VIH, while the device is busy, the device remains selected and does not go into
standby mode.
3.6
Read Enable (R)
The Read Enable pin, R, controls the sequential data output during read operations. Data is
valid tRLQV after the falling edge of R. The falling edge of R also increments the internal
column address counter by one.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NAND01GW3B2CN1F | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GW3B2CN6 | 制造商:STMicroelectronics 功能描述:128M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| NAND01GW3B2CN6E | 功能描述:IC FLASH 1GBIT 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| NAND01GW3B2CN6F | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GW3B2CWFD | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
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