
MOTOROLA
Appendix D. Initialization Example
D-7
ori r4, r4, 0x0f07 # (no reserved bits)
stwbrx r4, 0, r2 # write the modified data to CONFIG_DATA
;#
lis r3, MPC106_REG # start building new register number
ori r3, r3, MEM_END_47 # register number 0x94
stwbrx r3, 0, r1 # write this value to CONFIG_ADDR
lis r4, 0x3f37 # Each bank on MDC2 is 8MB
ori r4, r4, 0x2f27 # (no reserved bits)
stwbrx r4, 0, r2 # write the modified data to CONFIG_DATA
;#
lis r3, MPC106_REG # start building new register number
ori r3, r3, EXT_MEM_END_03 # register number 0x98
stwbrx r3, 0, r1 # write this value to CONFIG_ADDR
lwbrx r4, 0, r2 # load r4 from CONFIG_DATA
lis r0, 0xfcfc # Each bank on MDC2 is 8MB
ori r0, r0, 0xfcfc #
and r4, r4, r0 # clears all non-reserved bits
stwbrx r4, 0, r2 # write the modified data to CONFIG_DATA
;#
lis r3, MPC106_REG # start building new register number
ori r3, r3, EXT_MEM_END_47 # register number 0x9c
stwbrx r3, 0, r1 # write this value to CONFIG_ADDR
lwbrx r4, 0, r2 # load r4 from CONFIG_DATA
lis r0, 0xfcfc # Each bank on MDC2 is 8MB
ori r0, r0, 0xfcfc #
and r4, r4, r0 # clears all non-reserved bits
stwbrx r4, 0, r2 # write the modified data to CONFIG_DATA
;#
lis r3, MPC106_REG # start building new register number
ori r3, r3, MEM_BANK_EN # register number 0xa0
stwbrx r3, 0, r1 # write this value to CONFIG_ADDR
lis r4, 0x0000 # ENABLE ALL 8 BANKS OF DRAM
ori r4, r4, 0x00ff # (no reserved bits)
stb r4, 0(r2) # write the modified data to CONFIG_DATA
b endmdc2init #jump to enable memories
;#**********************edo initialization************************************
initmdc2edo:
;#
lis r3, MPC106_REG # start building new register number
ori r3, r3, MCCR1 # register number 0xf0
stwbrx r3, 0, r1 # write this value to CONFIG_ADDR
;#