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Serial Interface with Time Slot Assigner
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MC68360 USER’S MANUAL
The TSA also allows two TDM channels to be supported simultaneously. Thus, in its most
flexible mode, the TSA can provide two separate TDM channels, each with an independent
receive and transmit routing assignment and independent sync pulse and clock inputs (see
Figure 7-21). Thus, the TSA can support four, independent, half-duplex TDM sources, two
in reception and two in transmission, using four sync inputs and four clock inputs.
Figure 7-21. Dual TDM Channel Example
In addition to channel programming, the TSA supports up to four strobe outputs that may be
asserted on a bit basis or a byte basis. These strobes are completely independent from the
channel routing used by the SCCs and SMCs. They are useful for interfacing to other
devices that do not support the multiplexed interface or for enabling/disabling three-state I/
O buffers in a multi-transmitter architecture. (Note that open-drain programming on the
TXDx pins to support a multi-transmitter architecture is programmed in the parallel I/O
block.) These strobes can also be used for generating output waveforms to support such
applications as stepper motor control.
Most TSA programming is accomplished in two SI RAMs, each of size 64
× 16 bits. These
SI RAMs are directly accessible by the host processor in the internal register section of the
QUICC and are not associated with the dual-port RAM. One SI RAM is always used to pro-
QUICC
TDMa Rx
SCC3
SMC1
TDMa Tx
SCC2
SMC1
TDMa Tx SYNC
TDMa Tx CLOCK
TSA
TDMa
SCC2
TDMa Rx SYNC
TDMa Rx CLOCK
TDMb Rx
SCC2
TDMb Tx
SCC3
TDMb Tx SYNC
TDMb Tx CLOCK
SCC4
TDMb Rx SYNC
TDMb Rx CLOCK
TDMb
NOTE: SCCs may receive on one TDM and transmit on another (e.g., SCC2 and SCC3).
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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