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參數(shù)資料
| 型號： | HSP50216KI |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Four-Channel Programmable Digital DownConverter |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA196 |
| 封裝： | BGA-196 |
| 文件頁數(shù)： | 19/53頁 |
| 文件大?。?/td> | 561K |
| 代理商： | HSP50216KI |
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19
Basic Instruction Set
1. Wait for number of input samples
>
threshold
127:9 = 0
8:0 = 001
0000,0000,0000,0001h
2. Jumpunconditional
127:9 = 0
8:0 = 1JJJJJ111b
example: jump to step 0= 0000,0000,0000,0107h
3. Jump RSCO (jump on resampler NCO carry output)
127:9 = 0
8:0 = 1JJJJJ101b
example: jump RSCO, step 0= 0000,0000,0000,0105h
4. Jump RSCO (jump on no resampler NCO carry output)
127:9 = 0
8:0 = 1JJJJJ100b
example: jump RSCO, step 0 = 0000,0000,0000,0104h
5. NOP single clock
127:9 = 0
8:0 = 010000000b
NOP1 = 0000,0000,0000,0080h
6. LoadLoopCounter
127:21 = 0
20:9 = Loop counter preload (tested against 0)
8:0 = 010000100b
example: LdLpCntr 14 = 0000,0000,0000,1C84h
7. NOPs more than 1 clock period
NOP
8. FIR examples
even#taps, odd#taps, even/odd symmetry, asymmetric,
complex, hbf, interpolation, interpolation hbf, resampler,
u/c
Single FIR Basic Program
This is the basic program for a single FIR. This program applies to decimation filters (including DECx1) that are symmetric or
asymmetric (but not complex). The FIR output is routed through path A with the AGC enabled.
0 - WAIT FOR ENOUGH SAMPLES
0000
0000
0000
0000
0000
0000
0000
0000
127:96
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
95:64
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
64:32
00000000h
0000
0000
0000
0000
0000
0000
0000
0001
31:0
00000001h
1 - FIR
0000
0001
0101
1111
1111
100R
RRRR
RRRR
127:96
015FF---h
00TT
TTTT
TTTD
DDDD
DDDD
0000
0000
0111
95:64
-----007h
0000
1000
0000
0000
0000
1010
0000
0000
63:32
08000A00h
0000
1011
0000
0000
0FFF
FFF0
1100
1000
31:0
0B00--C8h
2 - JUMP TO STEP 0
0000
0000
0000
0000
0000
0000
0000
0000
127:96
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
95:64
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
64:32
00000000h
0000
0000
0000
0000
0000
0001
0000
0111
31:0
00000107h
Four bit fields must be filled in:
F - filter type (this example applies to types 1-5)
D - decimation (also loaded into wait threshold)
T - number of taps minus 1
R - clocks/calculation (=floor((taps+1)/2) for symmetric, = taps for asymmetric)
The rest of the instruction RAM would typically be filled with NOP instructions:
0000
0000
0000
0000
0000
0000
0000
0000
127:96
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
95:64
00000000h
0000
0000
0000
0000
0000
0000
0000
0000
64:32
00000000h
0000
0000
0000
0000
0000
0000
1000
0000
31:0
00000080h
HSP50216
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| HSP50216KIZ | 功能描述:上下轉(zhuǎn)換器 MULTI-CH PROGRAM CONV BGA PKG IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50306 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Digital QPSK Demodulator |
| HSP50306 WAF | 制造商:Intersil Corporation 功能描述: |
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| HSP50306SC-25 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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