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參數(shù)資料
| 型號： | EVAL-ADUC7023QSPZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 84/96頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7023 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC7023 |
| 所含物品： | 板 |
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Data Sheet
ADuC7023
| Page 85 of 96
T1LD Register
Name:
T1LD
Address:
0xFFFF0320
Default value:
0x00000000
Access:
Read/write
T1LD is a 32-bit load register that holds the 32-bit value that is
loaded into the counter.
T1VAL Register
Name:
T1VAL
Address:
0xFFFF0324
Default value:
0xFFFFFFFF
Access:
Read
T1VAL is a 32-bit read-only register that represents the current
state of the counter.
T1CON Register
Name:
T1CON
Address:
0xFFFF0328
Default value:
0x00000000
Access:
Read/write
T1CON is the configuration MMR described in Table 103.
Table 103. T1CON MMR Bit Descriptions
Bit
Value
Description
31 to 18
Reserved.
17
Event select bit. This bit is set by the user
to enable time capture of an event. This
bit is cleared by the user to disable time
capture of an event.
16 to 12
Event select range, 0 to 31. These events
are as described in Table 88. All events are
offset by two, that is, Event 2 in Table 88
becomes Event 0 for the purposes of
Timer1.
11 to 9
Clock select.
000
Core clock (HCLK).
001
Internal 32.768 kHz crystal
010
UCLK
011
P1.1 raising edge triggered.
8
Count up. This bit is set by the user for
Timer1 to count up. This bit is cleared by
the user for Timer1 to count down by
default.
7
Timer1 enable bit. This bit is set by the
user to enable Timer1. This bit is cleared
by the user to disable Timer1 by default.
Bit
Value
Description
6
Timer1 mode. This bit is set by the user to
operate in periodic mode. This bit is
cleared by the user to operate in free-
running mode. Default mode.
5 to 4
Format.
00
Binary.
01
Reserved.
10
Hours, minutes, seconds, hundredths
(23 hours to 0 hour).
11
Hours, minutes, seconds, hundredths
(255 hours to 0 hour).
3 to 0
Prescale.
0000
Source clock/1.
0100
Source clock/16.
1000
Source clock/256.
1111
Source clock/32,768.
T1CLRI Register
Name:
T1CLRI
Address:
0xFFFF032C
Default value:
0xXX
Access:
Write
T1CLRI is an 8-bit register. Writing any value to this register
clears the Timer1 interrupt.
T1CAP Register
Name:
T1CAP
Address:
0xFFFF0330
Default value:
0x00000000
Access:
Read
T1CAP is a 32-bit register. It holds the value contained in T1VAL
when a particular event occurrs. This event must be selected in
T1CON.
Rev. E
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