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| 型號： | EVAL-ADUC7023QSPZ1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 79/96頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADUC7023 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ PLUS 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC7023 |
| 所含物品： | 板 |
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ADuC7023
Data Sheet
| Page 80 of 96
IRQP0 Register
Name:
IRQP0
Address:
0xFFFF0020
Default value: 0x00000000
Access:
Read and write
Table 92. IRQP0 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit
30 to 28
PLLPI
A priority level of 0 to 7 can be set for
PLL lock interrupt.
27
Reserved
Reserved bit
26 to 24
ADCPI
A priority level of 0 to 7 can be set for
the ADC interrupt source.
23
Reserved
Reserved bit
22 to 20
FlashPI
A priority level of 0 to 7 can be set for
the Flash controller interrupt source.
19
Reserved
Reserved bit.
18 to 16
T2PI
A priority level of 0 to 7 can be set for
Timer2.
15
Reserved
Reserved bit.
14 to 12
T1PI
A priority level of 0 to 7 can be set for
Timer1.
11
Reserved
Reserved bit.
10 to 8
T0PI
A priority level of 0 to 7 can be set for
Timer0.
7
Reserved
Reserved bit
6 to 4
SWINTP
A priority level of 0 to 7 can be set for
the software interrupt source.
3 to 0
Reserved
Interrupt 0 cannot be prioritized.
IRQP1 Register
Name:
IRQP1
Address:
0xFFFF0024
Default value: 0x00000000
Access:
Read and write
Table 93. IRQP1 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit.
30 to 28
PSMPI
A priority level of 0 to 7 can be set for
the power supply monitor interrupt
source.
27
Reserved
Reserved bit.
26 to 24
COMPI
A priority level of 0 to 7 can be set for
comparator.
23
Reserved
Reserved bit.
22 to 20
IRQ0PI
A priority level of 0 to 7 can be set for
IRQ0.
19
Reserved
Reserved bit.
Bit
Name
Description
18 to 16
SPIPI
A priority level of 0 to 7 can be set for
SPI.
15
Reserved
Reserved bit.
14 to 12
I2C1SPI
A priority level of 0 to 7 can be set for
I2C1 slave.
11
Reserved
Reserved bit.
10 to 8
I2C1MPI
A priority level of 0 to 7 can be set for
I2C1 master.
7
Reserved
Reserved bits.
6 to 4
I2C0SPI
A priority level of 0 to 7 can be set for
I2C0 slave.
3
Reserved
Reserved bits.
2 to 0
I2C0MPI
A priority level of 0 to 7 can be set for
I2C0 master.
IRQP2 Register
Name:
IRQP2
Address:
0xFFFF0028
Default value: 0x00000000
Access:
Read and write
Table 94. IRQP2 MMR Bit Designations
Bit
Name
Description
31 to 23
Reserved
Reserved bit.
22 to 20
PWMPI
A priority level of 0 to 7 can be set for
PWM.
19
Reserved
Reserved bit.
18 to 16
PLA1PI
A priority level of 0 to 7 can be set for
PLA IRQ1.
15
Reserved
Reserved bit.
14 to 12
IRQ3PI
A priority level of 0 to 7 can be set for
IRQ3.
11
Reserved
Reserved bit.
10 to 8
IRQ2PI
A priority level of 0 to 7 can be set for
IRQ2.
7
Reserved
Reserved bit.
6 to 4
PLA0PI
A priority level of 0 to 7 can be set for
PLA IRQ0.
3
Reserved
Reserved bit.
2 to 0
IRQ1PI
A priority level of 0 to 7 can be set for
IRQ1.
Rev. E
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| EVAL-ADuC7023QSPZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU with Enhanced IRQ Handler |
| EVALADUC7023QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVAL-ADUC7024QS | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk |
| EVAL-ADUC7024QS-U2 | 制造商:Analog Devices 功能描述:QUICK START DEVL SYST EVAL BOARD I.C. - Bulk |
| EVAL-ADUC7024QS-U3 | 制造商:Analog Devices 功能描述:ARM7 ADUC7024 QUICKSTART DEV KIT |
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