
Data Sheet
ADuC7023
| Page 39 of 96
FEEMOD Register
Name:
FEEMOD
Address:
0xFFFFF804
Default value:
0x0000
Access:
Read/write
Function:
FEEMOD sets the operating mode of the flash control interface
. Table 32 shows FEEMOD MMR bit designations.
Table 32. FEEMOD MMR Bit Designations
Bit
Description
15 to 9
Reserved.
8
Reserved. Always set this bit to 0.
7 to 5
4
Flash/EE interrupt enable.
This bit is set by the user to enable the Flash/EE interrupt. The interrupt occurs when a command is complete.
This bit is cleared by the user to disable the Flash/EE interrupt.
3
Erase/write command protection.
This bit is set by the user to enable the erase and write commands.
This bit is cleared to protect the Flash/EE against erase/write command.
2 to 0
Reserved. Always set this bit to 0.
FEECON Register
Name:
FEECON
Address:
0xFFFFF808
Default value:
0x07
Access:
Read/write
Function:
FEECON is an 8-bit command register. The commands are described in
Table 33.Table 33. Command Codes in FEECON
Code
Command
Description
Null
Idle state.
Single read
Load FEEDAT with the 16-bit data. Indexed by FEEADR.
Single write
Write FEEDAT at the address pointed by FEEADR. This operation takes 50 s.
Erase/write
Erase the page indexed by FEEADR, and write FEEDAT at the location pointed by FEEADR. This operation takes
approximately 24 ms.
Single verify
Compare the contents of the location pointed by FEEADR to the data in FEEDAT. The result of the comparison is
returned in FEESTA Bit 1.
Single erase
Erase the page indexed by FEEADR.
Mass erase
Erase 62 kB of user space. The 2 kB of kernel are protected. This operation takes 2.48 sec. To prevent accidental
0x07
Reserved
Reserved.
0x08
Reserved
Reserved.
0x09
Reserved
Reserved.
0x0A
Reserved
Reserved.
0x0B
Signature
Give a signature of the 64 kB of Flash/EE in the 24-bit FEESIGN MMR. This operation takes 32,778 clock cycles.
0x0C
Protect
This command can run one time only. The value of FEEPRO is saved and removed only with a mass erase (0x06) or
the key (FEEADR/FEEDAT).
Rev. E