參數(shù)資料
型號: XCF128XFTG64C
廠商: Xilinx Inc
文件頁數(shù): 56/88頁
文件大?。?/td> 0K
描述: IC PROM SRL 128M GATE 64-FTBGA
標(biāo)準(zhǔn)包裝: 1
可編程類型: 系統(tǒng)內(nèi)可編程
存儲容量: 128Mb
電源電壓: 1.7 V ~ 2 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TBGA
供應(yīng)商設(shè)備封裝: 64-TFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 601 (CN2011-ZH PDF)
其它名稱: 122-1578
Platform Flash XL High-Density Configuration and Storage Device
DS617 (v3.0.1) January 07, 2010
Product Specification
6
R
Write Protect (WP)
Write Protect is an input that gives an additional hardware
protection for each block. When Write Protect is at VIL, the
Lock-Down is enabled, and the protection status of the
Locked-Down blocks cannot be changed. When Write
Protect is at VIH, the Lock-Down is disabled, and the
Locked-Down blocks can be locked or unlocked.
Reset (RP)
The Reset input provides a hardware reset of the memory.
When Reset is at VIL, the memory is in reset mode: the
outputs are high impedance, and the current consumption is
reduced to the Reset supply current IDD2. After Reset all
blocks are in the Locked state, and the Configuration
Register is reset. When Reset is at VIH, the device is in
normal operation. Exiting reset mode the device enters the
synchronous read mode and the FALS is executed.
X-Ref Target - Figure 6
Notes:
1.
Figure 6: FT64 Package Connections (Top View through Package)
DQ6
A0
VSSQ
VDD
DQ10
VDD
DQ7
DQ5
VDDQ
DQ2
H
DQ14
VSS
DQ13
D
A15
A19
E
A8
C
A16
A20
A10
A14
K
A7
B
A18
A1
A12
A13
A
8
7
6
5
4
3
2
1
A6
A2
A3
A4
G
F
E
DQ0
A5
VPP
A17
A9
A11
RP
DQ15
DQ9
DQ8
DQ1
DQ4
DQ3
G
DQ12
DQ11
W
VSS
NC
A21
A22
READY_WAIT
WP
NC
L
DS617_10_110807
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