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Chapter 9 512 KByte Flash Module (S12XFTM512K3V1)
MC9S12XF - Family Reference Manual, Rev.1.19
Freescale Semiconductor
319
9.4.2.3
Erase Verify P-Flash Section Command
The Erase Verify P-Flash Section command will verify that a section of code in the P-Flash memory is
erased. The Erase Verify P-Flash Section command defines the starting point of the code to be verified and
the number of phrases. The section to be verified cannot cross a 256 Kbyte boundary in the P-Flash
memory space.
Upon clearing CCIF to launch the Erase Verify P-Flash Section command, the Memory Controller will
verify the selected section of Flash memory is erased. The CCIF ag will set after the Erase Verify P-Flash
Section operation has completed.
Table 9-36. Erase Verify Block Command Error Handling
Register
Error Bit
Error Condition
FSTAT
ACCERR
Set if CCOBIX[2:0] != 000 at command launch
Set if a Load Data Field command sequence is currently active
Set if an invalid global address [22:16] is supplied
FPVIOL
None
MGSTAT1
Set if any errors have been encountered during the read
MGSTAT0
Set if any non-correctable errors have been encountered during the read
FERSTAT
EPVIOLIF
None
Table 9-37. Erase Verify P-Flash Section Command FCCOB Requirements
CCOBIX[2:0]
FCCOB Parameters
000
0x03
Global address [22:16] of
a P-Flash block
001
Global address [15:0] of the rst phrase to be veried
010
Number of phrases to be veried
Table 9-38. Erase Verify P-Flash Section Command Error Handling
Register
Error Bit
Error Condition
FSTAT
ACCERR
Set if CCOBIX[2:0] != 010 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Table 9-30)Set if an invalid global address [22:0] is supplied
Set if a misaligned phrase address is supplied (global address [2:0] != 000)
Set if the requested section crosses a 256 Kbyte boundary
FPVIOL
None
MGSTAT1
Set if any errors have been encountered during the read
MGSTAT0
Set if any non-correctable errors have been encountered during the read