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參數(shù)資料
| 型號： | S29WS128N0LBFW010 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| 中文描述： | 8M X 16 FLASH 1.8V PROM, 70 ns, PBGA84 |
| 封裝： | 11.60 X 8 MM, LEAD FREE, PLASTIC, FBGA-84 |
| 文件頁數(shù)： | 39/95頁 |
| 文件大?。?/td> | 1745K |
| 代理商： | S29WS128N0LBFW010 |
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44
S29WSxxxN_00_F0 October 29, 2004
Pr e l i m i n a r y
DQ6: Toggle Bit I .
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase
algorithm is in progress or complete, or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address in the same bank, and is valid after the rising
edge of the final WE# pulse in the command sequence (prior to the program or erase opera-
tion), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-
dress cause DQ6 to toggle. When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected,
DQ6 toggles for approximately tASP [all sectors protected toggle time], then returns to read-
ing array data. If not all selected sectors are protected, the Embedded Erase algorithm erases
the unprotected sectors, and ignores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing
or is erase-suspended. When the device is actively erasing (that is, the Embedded Erase al-
gorithm is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6
stops toggling. However, the system must also use DQ2 to determine which sectors are eras-
ing or erase-suspended. Alternatively, the system can use DQ7 (see the subsection on DQ7:
Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately tPAP after
the program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Em-
bedded Program Algorithm is complete.
See the following for additional information: Figure 7.33, Write Operation Status Flowchart;
Toggle Bit I on DQ6 requires either OE# or CE# to be de-asserted and reasserted to show the
change in state.
DQ2: Toggle Bit II .
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a
particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or
whether that sector is erase-suspended. Toggle Bit II is valid after the rising edge of the final
WE# pulse in the command sequence. DQ2 toggles when the system reads at addresses
within those sectors that have been selected for erasure. But DQ2 cannot distinguish whether
the sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether
the device is actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are
selected for erasure. Thus, both status bits are required for sector and mode information.
Refer to Table 7.34 to compare outputs for DQ2 and DQ6. See the following for additional in-
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