參數(shù)資料
型號(hào): S29WS128N0LBFW010
廠商: SPANSION LLC
元件分類: PROM
英文描述: 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY
中文描述: 8M X 16 FLASH 1.8V PROM, 70 ns, PBGA84
封裝: 11.60 X 8 MM, LEAD FREE, PLASTIC, FBGA-84
文件頁數(shù): 28/95頁
文件大小: 1745K
代理商: S29WS128N0LBFW010
34
S29WSxxxN_00_F0 October 29, 2004
Pr e l i m i n a r y
sectors may be from one sector to all sectors. The time between these additional cycles must
be less than tSEA. Any sector erase address and command following the exceeded time-out
(tSEA) may or may not be accepted. Any command other than Sector Erase or Erase Suspend
during the time-out period resets that bank to the read mode. The system can monitor DQ3
to determine if the sector erase timer has timed out (See the “DQ3: Sector Erase Timer” sec-
tion.) The time-out begins from the rising edge of the final WE# pulse in the command
sequence.
When the Embedded Erase algorithm is complete, the bank returns to reading array data and
addresses are no longer latched. Note that while the Embedded Erase operation is in
progress, the system can read data from the non-erasing banks. The system can determine
the status of the erase operation by reading DQ7 or DQ6/DQ2 in the erasing bank. Refer to
“Write Operation Status” for information on these status bits.
Once the sector erase operation has begun, only the Erase Suspend command is valid. All
other commands are ignored. However, note that a hardware reset immediately terminates
the erase operation. If that occurs, the sector erase command sequence should be reinitiated
once that bank has returned to reading array data, to ensure data integrity.
Figure 7.24 illustrates the algorithm for the erase operation. Refer to the “Erase/Program Op-
erations” section for parameters and timing diagrams.
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