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參數(shù)資料
| 型號： | S1C60N08F0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 78/145頁 |
| 文件大?。?/td> | 1118K |
| 代理商： | S1C60N08F0A0100 |
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I-26
EPSON
S1C60N08 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
4.4.5 Programming notes
(1) When input ports are changed from high to low by pull-down resistance, the fall of the waveform is
delayed on account of the time constant of the pull-down resistance and input gate capacitance.
Hence, when fetching input ports, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration. Aim for a wait time
of about 1 msec.
(2) When "Use" is selected with the noise rejector mask option, a maximum delay of 1 msec occurs from
time the interrupt conditions are established until the interrupt factor flag (IK) is set to "1" (until the
interrupt is actually generated). Hence, pay attention to the timing when reading out (resetting) the
interrupt factor flag. For example, when performing a key scan with the key matrix, the key scan
changes the input status to set the interrupt factor flag, so it has to be read out to reset it. However, if
the interrupt factor flag is read out immediately after key scanning, the delay will cause the flag to be
set after read-out, so that it will not be reset.
(3) Input interrupt programing related precautions
Port K input
Factor flag set Not set
Factor flag set
Input comparison
register
Mask register
Active status
Rising edge interrupt
Falling edge interrupt
When the content of the mask register is rewritten while the port K input is in the active status, the
input interrupt factor flags are set at and , being the interrupt due to the falling edge and
the interrupt due to the rising edge.
Fig. 4.4.5.1 Input interrupt timing
When using an input interrupt, if you rewrite the content of the mask register, when the value of the
input terminal which becomes the interrupt input is in the active status, the factor flag for input
interrupt may be set.
Therefore, when using the input interrupt, the active status of the input terminal implies
input terminal = low status, when the falling edge interrupt is effected and
input terminal = high status, when the rising edge interrupt is effected.
When an interrupt is triggered at the falling edge of an input terminal, a factor flag is set with the
timing of shown in Figure 4.4.5.1. However, when clearing the content of the mask register with the
input terminal kept in the low status and then setting it, the factor flag of the input interrupt is again
set at the timing that has been set.
Consequently, when the input terminal is in the active status (low status), do not rewrite the mask
register (clearing, then setting the mask register), so that a factor flag will only set at the falling edge
in this case. When clearing, then setting the mask register, set the mask register, when the input
terminal is not in the active status (high status).
When an interrupt is triggered at the rising edge of the input terminal, a factor flag will be set at the
timing of shown in Figure 4.4.5.1. In this case, when the mask registers cleared, then set, you should
set the mask register, when the input terminal is in the low status.
In addition, when the mask register = "1" and the content of the input comparison register is rewritten
in the input terminal active status, an input interrupt factor flag may be set. Thus, you should rewrite
the content of the input comparison register in the mask register = "0" status.
(4) Read out the interrupt factor flag (IK) only in the DI status (interrupt flag = "0"). Read-out during EI
status (interrupt flag = "1") will cause malfunction.
(5) Write the interrupt mask register (EIK) only in the DI status (interrupt flag = "0"). Writing during EI
status (interrupt flag = "1") will cause malfunction.
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