參數(shù)資料
型號(hào): S1C60N08F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 30/145頁
文件大?。?/td> 1118K
代理商: S1C60N08F0A0100
S1C60R08 TECHNICAL HARDWARE
EPSON
II-7
CHAPTER 2: ROM EMULATOR/ROM EMULATOR PROGRAMMER
CHAPTER
2 ROM EMULATOR/
ROM EMULATOR PROGRAMMER
The S1C60R08 has a built-in ROM emulator, which is constructed by RAM, to emulate mask ROM. The
ROM emulator is programmed from outside through the serial interface (programmer) circuit and then
its data is read by the CPU.
This chapter explain the ROM emulator and the Programmer circuit.
2.1 Configuration of ROM Emulator
The built-in ROM emulator is the same structure with the mask ROM built-in S1C60N08. And used for
loading the user-program. That has a capacity of 4,096 steps
× 12 bits. The program area consists of 16 (0-
15) pages
× 256 (00H–FFH) steps. After initial reset, the program beginning address is set to bank 0, page
1, step 00H. The interrupt vector is allocated to page 1, steps 01H–0FH.
Step 00H
Step 0FH
Step 10H
Step FFH
12 bits
Program start address
Interrupt vector area
Bank 0
Page 0
Page 1
Page 2
Page 3
Page 15
Step 01H
Fig. 2.1.1 ROM emulator configuration
The ROM emulator data is downloaded from an external Serial EEPROM through the Programmer
circuit. After power on or a HIGH pulse is input to the OTPRST pin, the ROM emulator data is initialized
and downloading will be started.
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