
I-24
EPSON
S1C60N08 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
4.4.3 Mask option
The contents that can be selected with the input port mask option are as follows:
(1) Internal pull-down resistor can be selected for each of the nine bits of the input ports (K00–K03, K10,
K20–K23).
When you have selected "Gate direct", take care that the floating status does not occur for the input.
Select "With pull-down resistor" for input ports that are not being used.
(2) The input interrupt circuit contains a noise rejector for preventing interrupt occurring through noise.
The mask option enables selection of whether to use the noise rejector for each separate terminal
series.
When "Use" is selected, a maximum delay of 1 msec occurs from the time interrupt condition is
established until the interrupt factor flag (IK) is set to "1".
4.4.4 Control of input ports
Table 4.4.4.1 lists the input ports control bits and their addresses.
Table 4.4.4.1 Input port control bits
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
2E3H
K03
K02
K01
K00
R
K03
K02
K01
K00
– 2
High
Low
Input port data (K00–K03)
2E5H
EIK03
EIK02
EIK01
EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
Enable
Mask
Interrupt mask register (K00–K03)
2E4H
KCP03
KCP02
KCP01
KCP00
R/W
KCP03
KCP02
KCP01
KCP00
0
Input comparison register (K00–K03)
2E7H
SCTRG
EIK10
KCP10
K10
WR
R/W
SCTRG
3
EIK10
KCP10
K10
–
0
– 2
Trigger
Enable
High
–
Mask
Low
Serial I/F clock trigger
Interrupt mask register (K10)
Input comparison register (K10)
Input port data (K10)
2EAH
IK1
IK0
SWIT1
SWIT0
R
IK1 4
IK0 4
SWIT1 4
SWIT0 4
0
Yes
No
Interrupt factor flag (K10)
Interrupt factor flag (K00–K03)
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
1
2
Initial value at initial reset
Not set in the circuit
3
4
Always "0" being read
Reset (0) immediately after being read
5 Undefined
2F3H
0
IK2
ISIO
R
0 3
IK2 4
ISIO 4
– 2
0
–
Yes
–
No
Unused
Interrupt factor flag (K20–K23)
Interrupt factor flag (serial I/F)
2F4H
K23
K22
K21
K20
R
K23
K22
K21
K20
– 2
High
Low
Input port data (K20–K23)
2F5H
EIK23
EIK22
EIK21
EIK20
R/W
EIK23
EIK22
EIK21
EIK20
0
Enable
Mask
Interrupt mask register (K20–K23)