參數(shù)資料
型號： S1C60N08F0A0100
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁數(shù)： 35/145頁
文件大?。?/td> 1118K
代理商： S1C60N08F0A0100
S1C60N08 TECHNICAL HARDWARE
EPSON
I-1
CHAPTER 1: OVERVIEW
CHAPTER
1OVERVIEW
The S1C60N08 Series is a single-chip microcomputer made up of the 4-bit core CPU S1C6200C, ROM
(4,096 words
× 12 bits), RAM (832 words × 4 bits), LCD driver, serial interface, event counter with dial
input function, watchdog timer, and two types of time base counter. Because of its low-voltage operation
and low power consumption, this series is ideal for a wide range of applications, and is especially
suitable for battery-driven systems.
1.1 Configuration
The S1C60N08 Series is configured as follows, depending on supply voltage and oscillation circuits.
Table 1.1.1 Model configuration
Model
Supply voltage
Oscillation
circuit
Evaluation tool
S1C60N08
3.0 V
OSC1 only
(Single clock)
S1C60R08
S1C60A08
3.0 V
OSC1 and OSC3
(Twin clock)
S1C60L08
1.5 V
OSC1 only
(Single clock)
–
1.2 Features
Table 1.2.1 Features
Model
OSC1 oscillation circuit
OSC3 oscillation circuit
Instruction set
Instruction execution time
(differs depending on instruction)
(CLK: CPU operation frequency)
ROM capacity
RAM capacity
Input ports
Output ports
I/O ports
Serial interface
LCD driver
Time base counter
Watchdog timer
Event counter
Sound generator
Analog comparator
Battery low detection circuit
(BLD)
External interrupt
Internal interrupt
Supply voltage
Current
consumption
(Typ. value)
Form when shipped
S1C60N08/S1C60R08
S1C60L08
S1C60A08/S1C60R08
Crystal oscillation circuit 32.768 kHz (Typ.)/38.400 kHz (Typ.)
–
CR or ceramic oscillation
circuit (selected by mask
option) 500 kHz (Typ.)
108 types
153
sec, 214 sec, 366 sec (CLK = 32.768 kHz)
130
sec, 182 sec, 313 sec (CLK = 38.400 kHz)
–
10
sec, 14 sec, 24 sec
(CLK = 500 kHz)
4,096 words
× 12 bits
832 words
× 4 bits
9 bits (pull-down resistor can be added by mask option)
8 bits (BZ, BZ, FOUT and SIOF outputs are available by mask option)
8 bits (pull-down resistor is added during input data read-out)
1 port (8-bit clock synchronous system)
48 segments
× 4, 3, or 2 commons (selected by mask option)
V-3 V 1/4, 1/3 or 1/2 duty (voltage regulator and booster circuits built-in)
Two types (timer and stopwatch)
Built-in (can be disabled by mask option)
Two 8-bit inputs (dial input evaluation or independent)
Programmable in 8 sounds (8 frequencies)
Digital envelope built-in (can be disabled by mask option)
Inverted input
× 1, non-inverted input × 1
Dual system (programmable in 8 values and a fixed value)
2.4 V, 2.2–2.55 V
1.2 V, 1.05–1.4 V
2.4 V, 2.2–2.55 V
Input interrupt: 3 systems
Time base counter interrupt: 2 systems
Serial interface interrupt: 1 system
3.0 V (1.8–3.5 V)
1.5 V (0.9–1.7 V)
3.0 V (2.2–3.5 V)
1.0
A
1.0
A
1.1
A
2.2
A
2.2
A
3.0
A
––
50
A
QFP5-100pin, QFP15-100pin or chip
CLK= 32.768 kHz
(when halted)
CLK= 32.768 kHz
(when executed)
CLK= 500 kHz
(when executed)
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