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參數(shù)資料
| 型號(hào)： | S1C60N08F0A0100 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 130/145頁(yè) |
| 文件大小： | 1118K |
| 代理商： | S1C60N08F0A0100 |
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S1C60N08 TECHNICAL HARDWARE
EPSON
I-73
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Heavy Load Protection Function and Sub-BLD Circuit)
(2) In case of S1C60N08/60A08
The S1C60N08/60A08 has the heavy load protection function for when the battery load becomes
heavy and the source voltage changes, such as when an external buzzer sounds or an external lamp
lights. The state where the heavy load protection function is in effect is called the heavy load protec-
tion mode. Compared with the normal operation mode, this mode can reduce the output voltage
variation of the constant voltage/booster voltage circuit of the LCD system.
The normal mode changes to the heavy load protection mode in the following case:
When the software changes the mode to the heavy load protection mode (HLMOD = "1")
The heavy load protection mode switches the constant voltage circuit of the LCD system to the high-
stability mode from the low current consumption mode. Consequently, more current is consumed in
the heavy load protection mode than in the normal mode. Unless it is necessary, be careful not to set
the heavy load protection mode with the software.
4.15.2 Operation of sub-BLD circuit
Software control of the sub-BLD circuit is virtually the same as for the BLD circuit, except that the
evaluation voltage cannot be set by programming.
Just as for the BLD circuit, HLMOD or BLS control the detection timing of the sub-BLD circuit and the
timing for writing the detection data to the sub-BLD latch. However, for the S1C60L08, even if the sub-
BLD circuit detects a drop in source voltage (1.2 V or below) and invokes the heavy load protection mode,
this will be the same as when the software invokes the heavy load protection mode, in that the BLD
circuit and sub-BLD circuit will be sampled in timing synchronized to the 2 Hz output from the prescaler.
If the sub-BLD circuit detects a voltage drop and enters the heavy load protection mode, it will return to
the normal mode once the source voltage recovers and the BLD circuit judges that the source voltage is
1.2 V or more.
For the S1C60N08/60A08, when the sub-BLD circuit detects a drop in source voltage (2.4 V or below) and
the detection data is written to the sub-BLD latch, the BLD circuit and sub-BLD circuit will be sampled in
timing synchronized to the 2 Hz output from the prescaler. Once the source voltage recovers and the BLD
circuit judges that the source voltage is 2.4 V or more, the BLD circuit and sub-BLD circuit won't be
sampled in timing synchronized to the 2 Hz output from the prescaler.
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| S1C62440F | 4-BIT, MROM, 2.3 MHz, MICROCONTROLLER, PQFP128 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C60N16 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C60R08 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63004 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63008 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63016 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
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