參數(shù)資料
型號(hào)： PI7C8150BNDIE
廠商： Pericom
文件頁(yè)數(shù)： 37/109頁(yè)
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 256-PBGA
標(biāo)準(zhǔn)包裝： 90
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（17x17）
包裝： 管件
安裝類型： 表面貼裝
PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 33 of 109
April 2009 – Revision 1.08
Device Number
P_AD[15:11]
Secondary IDSEL S_AD[31:16]
S_AD
1Fh
11111
Generate special cycle (P_AD[7:2] > 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
-
PI7C8150B can assert up to 9 unique address lines to be used as IDSEL signals for
up to 9 devices on the secondary bus, for device numbers ranging from 0 through 8.
Because of electrical loading constraints of the PCI bus, more than 9 IDSEL signals should
not be necessary. However, if device numbers greater than 9 are desired, some external
method of generating IDSEL lines must be used, and no upper address bits are then
asserted. The configuration transaction is still translated and passed from the primary bus to
the secondary bus. If no IDSEL pin is asserted to a secondary device, the transaction ends
in a master abort.
PI7C8150B forwards Type 1 to Type 0 configuration read or write transactions as delayed
transactions. Type 1 to Type 0 configuration read or write transactions are limited to a
single 32-bit data transfer.
3.7.3
TYPE 1 TO TYPE 1 FORWARDING
Type 1 to Type 1 transaction forwarding provides a hierarchical configuration mechanism
when two or more levels of PCI-to-PCI bridges are used.
When PI7C8150B detects a Type 1 configuration transaction intended for a PCI bus
downstream from the secondary bus, PI7C8150B forwards the transaction unchanged to the
secondary bus. Ultimately, this transaction is translated to a Type 0 configuration command
or to a special cycle transaction by a downstream PCI-to-PCI bridge. Downstream Type 1
to Type 1 forwarding occurs when the following conditions are met during the address
phase:
The lowest two address bits are equal to 01b.
The bus number falls in the range defined by the lower limit (exclusive) in the
secondary bus number register and the upper limit (inclusive) in the subordinate bus
number register.
The bus command is a configuration read or write transaction.
PI7C8150B also supports Type 1 to Type 1 forwarding of configuration write transactions
upstream to support upstream special cycle generation. A Type 1 configuration command
is forwarded upstream when the following conditions
are met:
The lowest two address bits are equal to 01b.
The bus number falls outside the range defined by the lower limit (inclusive) in the
secondary bus number register and the upper limit (inclusive) in the subordinate bus
number register.
The device number in address bits AD[15:11] is equal to 11111b.
The function number in address bits AD[10:8] is equal to 111b.
The bus command is a configuration write transaction.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C8150BNDIE-33 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2 Port 32B PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150DMAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150DND 制造商:Pericom Semiconductor Corporation 功能描述:BRIDGE 制造商:Pericom Semiconductor Corporation 功能描述:2 PORT PCI BRIDGE - Rail/Tube
PI7C8150DNDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150EVB 功能描述:界面開發(fā)工具 2 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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