參數(shù)資料
型號: PI7C8150BNDIE
廠商: Pericom
文件頁數(shù): 104/109頁
文件大?。?/td> 0K
描述: IC PCI-PCI BRIDGE ASYNC 256-PBGA
標(biāo)準(zhǔn)包裝: 90
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(17x17)
包裝: 管件
安裝類型: 表面貼裝
PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 94 of 109
April 2009 – Revision 1.08
14.1.48
SLOT NUMBER REGISTER – OFFSET B0h
Bit
Function
Type
Description
20:16
Expansion Slot
Number
R/W
Determines expansion slot number
Reset to 0
21
First in Chassis
R/W
First in chassis
Reset to 0
23:22
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
14.1.49
CHASSIS NUMBER REGISTER – OFFSET B0h
Bit
Function
Type
Description
31:24
Chassis Number
Register
R/W
Chassis number register.
Reset to 0
14.1.50
CAPABILITY ID REGISTER – OFFSET DCh
Bit
Function
Type
Description
7:0
Enhanced
Capabilities ID
R/O
Read as 01h to indicate that these are power management enhanced
capability registers.
14.1.51
NEXT ITEM POINTER REGISTER – OFFSET DCh
Bit
Function
Type
Description
15:8
Next Item
Pointer
R/O
Points to slot number register (0Bh).
14.1.52
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET
DCh
Bit
Function
Type
Description
18:16
Power
Management
Revision
R/O
Read as 001 to indicate the device is compliant to Revision 1.0 of
PCI Power Management Interface Specifications.
19
PME# Clock
R/O
Read as 0 to indicate PI7C8150B does not support the PME# pin.
20
Auxiliary Power
R/O
Read as 0 to indicate PI7C8150B does not support the PME# pin or
an auxiliary power source.
21
Device Specific
Initialization
R/O
Read as 0 to indicate PI7C8150B does not have device specific
initialization requirements.
24:22
Reserved
R/O
Read as 0
25
D1 Power State
Support
R/O
Read as 0 to indicate PI7C8150B does not support the D1 power
management state.
26
D2 Power State
Support
R/O
Read as 0 to indicate PI7C8150B does not support the D2 power
management state.
31:27
PME# Support
R/O
Read as 0 to indicate PI7C8150B does not support the PME# pin.
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