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參數(shù)資料
| 型號： | PI7C8150BNDIE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 108/109頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI-PCI BRIDGE ASYNC 256-PBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 98 of 109
April 2009 – Revision 1.08
that allows all processor signal pins to be driven and/or sampled, thereby providing direct
control and monitoring of processor pins at the system level.
This mode of operation is valuable for design debugging and fault diagnosis since it
permits examination of connections not normally accessible to the test system. The
following subsections describe the boundary-scan test logic elements: TAP pins,
instruction register, test data registers and TAP controller. Figure 16-1 illustrates how
these pieces fit together to form the JTAG unit.
Figure 16-1
Test Access Port Block Diagram
16.1.1
TAP PINS
The PI7C8150B’s TAP pins form a serial port composed of four input connections (TMS,
TCK, TRST_L and TDI) and one output connection (TDO). These pins are described in
Table 16-1. The TAP pins provide access to the instruction register and the test data
registers.
16.1.2
INSTRUCTION REGISTER
The Instruction Register (IR) holds instruction codes. These codes are shifted in through
the Test Data Input (TDI) pin. The instruction codes are used to select the specific test
operation to be performed and the test data register to be accessed.
The instruction register is a parallel-loadable, master/slave-configured 5-bit wide, serial-
shift register with latched outputs. Data is shifted into and out of the IR serially through the
TDI pin clocked by the rising edge of TCK. The shifted-in instruction becomes active upon
latching from the master stage to the slave stage. At that time the IR outputs along with the
TAP finite state machine outputs are decoded to select and control the test data register
selected by that instruction. Upon latching, all actions caused by any previous instructions
terminate.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8150BNDIE-33 | 功能描述:外圍驅(qū)動器與原件 - PCI 2 Port 32B PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8150DMAE | 功能描述:外圍驅(qū)動器與原件 - PCI 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8150DND | 制造商:Pericom Semiconductor Corporation 功能描述:BRIDGE 制造商:Pericom Semiconductor Corporation 功能描述:2 PORT PCI BRIDGE - Rail/Tube |
| PI7C8150DNDE | 功能描述:外圍驅(qū)動器與原件 - PCI 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8150EVB | 功能描述:界面開發(fā)工具 2 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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