參數(shù)資料
型號(hào): MT90520AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: 8-Port Primary Rate Circuit Emulation AAL1 SAR
中文描述: ATM SEGMENTATION AND REASSEMBLY DEVICE, PBGA456
封裝: 35 X 35 MM, 1.27 MM PITCH, PLASTIC, MS-034, BGA-456
文件頁(yè)數(shù): 109/180頁(yè)
文件大?。?/td> 1736K
代理商: MT90520AG
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MT90520
Data Sheet
109
Zarlink Semiconductor Inc.
Data TX_SAR Cell Buffer
possible sizes: 16 cells, 32 cells, 64 cells, 128 cells (each cell occupies 64 bytes; 32 words)
maximum of
4 K
words
Data RX_SAR Cell Buffer
possible sizes: 16 cells, 32 cells, 64 cells, 128 cells (each cell occupies 64 bytes; 32 words)
maximum of
4 K
words
SDT Segmentation Circular Buffers
each channel to be transmitted in ATM cells requires its own Segmentation Circular Buffer. Each buffer
occupies 64 words
up to 256 channels (8 ports x 32 channels per port) can be transmitted
maximum of
16 K
words
SDT Reassembly Circular Buffers
each channel which will be receiving data from ATM cells requires its own Reassembly Circular Buffer.
Each buffer has a programmable size, on a per-VC basis.
the size selected for a Reassembly Circular Buffer should be based upon the amount of CDV expected
on the VC, as well as the number of channels being carried on the VC (more buffering is required on a
per-channel basis for VCs with fewer channels, because more data for each channel is received at once
upon cell reception). Note that CDV can be accounted for within a larger-than-necessary buffer by
programming the Maximum Lead value.
Circular Buffer Size > Maximum Lead + Number of Bytes per Channel per Cell
Maximum Lead
= 2 bytes + ((2*CDV) / (0.125 ms/byte)). CDV is in ms.
Number of Bytes per Channel per Cell
= roundup(N/47). N = # of channels per VC.
programmable sizes for Reassembly Circular Buffers are as follows: 64 words, 128 words, 256 words,
512 words, and 1024 words
up to 256 channels (8 ports x 32 channels per port) can be received
maximum of
256 K
words
Figure 45 shows an example external memory allocation for the structures listed above. The example assumes the
maximum memory allocation for each of the structures. The size and location of the structures are programmable
and do not necessarily have to be located at the addresses given in the example. The base address in the figure is
the base address of external memory.
Figure 46 shows another sample external memory allocation for the structures listed above. The example assumes
the minimum memory allocation for each of the structures. The example assumes that no data cell transmission or
reception is required, that all channels are transmitted in trunking VCs carrying 128 channels (therefore requiring
only 2 VCs), and that minimum-sized Reassembly Circular Buffers are required. The size and location of the
structures are programmable and do not necessarily have to be located at the addresses given in the example. The
base address in the figure is the base address of external memory.
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