
MC68F375
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
4-77
The reset state of DATA[7:3] determines whether pins controlled by CSPAR1 are ini-
tially configured as high-order address lines or chip-selects. Table 4-28 shows the
correspondence between DATA[7:3] and the reset configuration of CS[10:6]/
ADDR[23:19]. This register may be read or written at any time. After reset, software
may enable one or more pins as discrete outputs.
Table 4-34 shows pin assignment field encoding. Pins that have no discrete output
function must not be programmed with the 0b00 encoding as this will configure the pin
for its alternate function. For instance, programming CS0PA[1:0] to 0b00 will configure
CS0/BR for the bus request (BR) function.
Port size determines the way in which bus transfers to an external address are allo-
cated. A port size of eight bits or sixteen bits can be selected when a pin is assigned
as a chip select. Port size and transfer size affect how the chip-select signal is
Table 4-32 CSPAR1 Pin Assignments
CSPAR1 Field
Chip-Select Signal
Alternate Signal
Discrete Output
CS10PA[1:0]
CS10
ADDR23
ECLK
CS9PA[1:0]
CS9
ADDR22
PC6
CS8PA[1:0]
CS8
ADDR21
PC5
CS7PA[1:0]
CS7
ADDR20
PC4
CS6PA[1:0]
CS6
ADDR19
PC3
Table 4-33 Reset Pin Function of CS[10:6]
Data Bus Pins at Reset
Chip-Select/Address Bus Pin Function
DATA7
DATA6
DATA5
DATA4
DATA3
CS10/
ADDR23
CS9/
ADDR22
CS8/
ADDR21
CS7/
ADDR20
CS6/
ADDR19
1
1111
CS10
CS9
CS8
CS7
CS6
1
111
0CS10
CS9
CS8
CS7
ADDR19
11
1
0X
CS10
CS9
CS8
ADDR20 ADDR19
11
0X
X
CS10
CS9
ADDR21 ADDR20 ADDR19
1
0
XXX
CS10
ADDR22 ADDR21 ADDR20 ADDR19
0
XXXX
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
Table 4-34 Pin Assignment Field Encoding
CSxPA[1:0]
Description
00
Discrete output
01
Alternate function
10
Chip-select (8-bit port)
11
Chip-select (16-bit port)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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