
MC68F375
CAN 2.0B CONTROLLER MODULE
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
7-28
7.8.5 Prescaler Divide Register
Table 7-16 CANCTRL1 Bit Settings
Bit(s)
Name
Description
15:8
CANCTRL0
7
SAMP
Sampling mode. The SAMP bit determines whether the TouCAN module will sample each
received bit one time or three times to determine its value.
0 = One sample, taken at the end of phase buffer segment 1, is used to determine the value
of the received bit.
1 = Three samples are used to determine the value of the received bit. The samples are tak-
en at the normal sample point and at the two preceding periods of the S-clock.
6—
Reserved
5
TSYNC
Timer synchronize mode. The TSYNC bit enables the mechanism that resets the free-run-
ning timer each time a message is received in message buffer 0. This feature provides the
means to synchronize multiple TouCAN stations with a special “SYNC” message (global net-
work time).
0 = Timer synchronization disabled.
1 = Timer synchronization enabled.
Note: there can be a bit clock skew of four to five counts between different TouCAN modules
that are using this feature on the same network.
4LBUF
Lowest buffer transmitted first. The LBUF bit defines the transmit-first scheme.
0 = Message buffer with lowest ID is transmitted first.
1 = Lowest numbered buffer is transmitted first.
3—
Reserved
2:0
PROPSEG
Propagation segment time. PROPSEG defines the length of the propagation segment in the
bit time. The valid programmed values are 0 to 7. The propagation segment time is calcu-
lated as follows:
Propagation Segment Time = (PROPSEG + 1) Time Quanta
where
1 Time Quantum = 1 Serial Clock (S-Clock) Period
PRESDIV — Prescaler Divide Register
0xYF F088
MSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
0
PRESDIV
CANCTRL2
RESET:
0
1
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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