
MC68F375
REGISTER DIAGRAM INDEX
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
C-2
–F–
FCSMCNT (FCSM counter register)
13-9FCSMSIC (FCSM status/interrupt control register)
13-7–H–
HSQR0 (TPU3 host sequence register
0) 8-16HSQR1 (TPU3 host sequence register
1) 8-16HSSR0 (TPU3 host service request register
0) 8-16HSSR1 (TPU3 host service request register
1) 8-16–I–
IFLAG (interrupt flag register)
7-33IMASK (interrupt mask register
) 7-33–L–
LJSRR (left justified, signed result register
) 5-51LJURR (left justified, unsigned result register)
5-51–M–
MCSMCNT (MCSM counter register)
13-14MCSMML (MCSM modulus latchl register)
13-14MCSMSIC (MCSM status/interrupt control register
) 13-12MISCNT (MISC counter)
9-6MISRH (multiple input signature register high)
9-5MISRL (multiple input signature register low)
9-5–P–
PEPAR (SCIM2 port E pin assignment register
) 4-89PFIVR (SCIM2 port F edge-detect interrupt vector register
) 4-93PFLVR (SCIM2 port F edge-detect interrupt level register)
4-93PFPAR (SCIM2 port F pin assignment register)
4-92PICR (SCIM2 periodic interrupt control register)
4-31PITR (SCIM2 periodic interrupt timer register
) 4-31PORTA-B (SCIM2 port A and B data registers)
4-88PORTC (SCIM2 PORTC data register
) 4-78PORTE (SCIM2 port E data register
s) 4-89PORTF (SCIM2 port F data registers
) 4-91PORTFE (SCIM2 port F edge-detect flag register
) 4-93PORTG, PORTH (SCIM2 port G,H data registers)
4-94PORTQA (port QA data register)
5-36PORTQB (port QB data register)
5-36PORTQS (port QS data register)
6-10PQSPAR (PORTQS pin assignment register)
6-11PRESDIV (prescaler divide register)
7-28PWMA (PWM period register
13-49PWMB (PWM pulse width register
13-49PWMC (PWM counter register
13-50PWMSIC (PWM status/interrupt control register)
13-45–Q–
QACR0 (QADC64 control register 0)
5-37QACR1 (QADC64 control register 1)
5-38QACR2 (QADC64 control register 2)
5-40QADC64INT (QADC64 interrupt register)
5-36QADC64MCR (QADC64 module configuration register
) 5-35QILR (QSMCM interrupt level register)
6-7F
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Freescale Semiconductor, Inc.
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