
Lucent Technologies Inc.
9
Preliminary Data Sheet
July 2000
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Note: Many of these signals are dual-function pins. During reset, these pins may be pulled up or down (as shown in Figure 5) to configure
various options. The secondary function is shown in smaller
print and described in Table 8.
Table 8. Special Mode Configurations
113, 54
10HDEN/
LEDFD/FEFI-
EN
[1:0]
I/O
10 Half-Duplex Enable
. The logic level of this pin is
detected at powerup or reset to determine whether
10Mbits/s half-duplex mode is available. When autone-
gotiation is enabled, this input sets the ability register bit
in advertisement register 4. When autonegotiation is not
enabled, this input will select the mode of operation. This
pin has an internal 40 k
pull-up resistor. See Table 8 for
FEFI_EN and Table 9 for LEDFD descriptions.
Pin No.
110, 57
Pin Name
NDRPTR
/LEDRX
[1:0]
I/O
I/O
Pin Description
Node-Repeater Select (Ports 1, 0)
. These pins are
detected during powerup or reset to determine the mode
of operation. If this pin is at logic high level, then the
PHY will go into Repeater mode; otherwise, if logic low it
will operate in node mode. These pins have an internal
40 k
pull-down. See Table 9 for LEDRX description.
Carrier Integrity Monitor Enable (Ports 1, 0)
. The CIM
function is only used for repeater operation. If both
NDRPTR pin and CIMEN pin are at logic high level dur-
ing powerup or reset, then the CIM function is enabled.
See Table 7 for 100FDEN description.
Fiber-Optic Mode Select
. This pin is tested during pow-
erup or reset only. If this pin is detected to be at logic
high level, then the PHY goes into fiber-optic mode.
Serial Mode Select
. At powerup or reset, if FOSEL pin
is pulled low and SRL10 is pulled high, then the MII
interface will be operated in serial mode for 10 Mbits/s
operation. Fiber-optic mode and 10 Mbits/s serial mode
cannot be set at the same time. Note that the serial
mode is only supported for 10 Mbits/s repeater opera-
tion. See Table 2 for FOSD+ description.
10 Mbits/s Repeater Clock
. For 10 Mbits/s repeater
mode, an external 10 MHz clock should be connected to
this pin for clocking of the transmit data. See Table 2 for
FOSD– description.
Far-End Fault Indicator Enable
. At powerup or reset, if
FOSEL pin is set high, logic level of this pin is latched
into bit 11 of register 18h. This pin has an internal 40 k
pull-up resistor. See Table 7 for 10HDEN and Table 9 for
LEDFD description.
125, 42
CIMEN
/100FDEN
[1:0]
I
116, 51
FOSEL[1:0]
I
38, 1
SRL10
/FOSD+
[1:0]
I
128, 39
RPTR10CLK/
FOSD–
[1:0]
I/O
113, 54
FEFI_EN/
10HDEN/
LEDFD
[1:0]
I/O
Pin No.
Pin Name
I/O
Pin Description
Pin Descriptions
(continued)
Table 7. Autonegotiation Configuration
(continued
)