參數(shù)資料
型號： LU3X32FT
廠商： Lineage Power
英文描述： Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器)
中文描述： 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器）
文件頁數(shù)： 2/54頁
文件大?。?/td> 626K
代理商： LU3X32FT
Table of Contents
Contents
Page
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
2
Lucent Technologies Inc.
Overview................................................................................................................................................................... 1
Features ................................................................................................................................................................... 1
Description................................................................................................................................................................ 4
Pin Information ......................................................................................................................................................... 5
Pin Descriptions........................................................................................................................................................ 6
Functional Description............................................................................................................................................ 12
Media Independent Interface (MII)...................................................................................................................... 12
100Base-X Module.............................................................................................................................................. 15
10Base-T Module................................................................................................................................................ 21
Clock Synthesizer................................................................................................................................................ 23
Autonegotiation ................................................................................................................................................... 24
Reset Operation.................................................................................................................................................. 25
Register Descriptions ............................................................................................................................................. 27
Absolute Maximum Ratings (TA = 25
°
C)............................................................................................................... 40
Electrical Characteristics........................................................................................................................................ 41
Clock Timing........................................................................................................................................................... 42
Outline Diagram...................................................................................................................................................... 53
128-Pin TQFP ..................................................................................................................................................... 53
Tables
Page
Table 1. Twisted-Pair Magnetic Interface ................................................................................................................. 6
Table 2. Fiber-Optic Transceiver Interface ............................................................................................................... 6
Table 3. Twisted-Pair Transceiver Control................................................................................................................ 6
Table 4. MII Interface ............................................................................................................................................... 6
Table 5. PHY Address Configuration....................................................................................................................... 7
Table 4. MII Interface (continued) ............................................................................................................................ 7
Table 6. 100 Base-X PCS Configuration.................................................................................................................. 8
Table 7. Autonegotiation Configuration.................................................................................................................... 8
Table 8. Special Mode Configurations..................................................................................................................... 9
Table 9. LED and Status Outputs .......................................................................................................................... 10
Table 10. Clock and Chip Reset ............................................................................................................................ 11
Table 11. Power and Ground ................................................................................................................................. 11
Table 12. Symbol Code Scrambler ........................................................................................................................ 17
Table 13. Initial Value of Autonegotiation Registers............................................................................................... 26
Table 14. MII Management Registers Legends..................................................................................................... 27
Table 15. Control Register (Per Port) [Register 0h] ............................................................................................... 28
Table 16. Status Register Bit Definitions (Per Port) [Register 1h].......................................................................... 30
Table 17. PHY Identifier (Per Port) [Register 2h] ................................................................................................... 31
Table 18. PHY Identifier (Per Port) [Register 3h] ................................................................................................... 31
Table 19. Advertisement (Per Port) [Register 4h] .................................................................................................. 32
Table 20. Autonegotiation Link Partner Ability (Per Port) [Register 5h].................................................................. 32
Table 21. Autonegotiation Expansion Register (Per Port) [Register 6h] ................................................................ 33
Table 22. ............................................................................................... Isolate Counter (Per Port) [Register 12h]33
Table 23. False Carrier Counter (Per Port) [Register 13h]..................................................................................... 33
Table 24. Receive Error Counter (Per Port) [Register 15h].................................................................................... 34
Table 25. PHY Control/Status Register (Per Port) [Register 17h].......................................................................... 34
Table 26. Config 100 Register (Per Port) [Register 18h]........................................................................................ 36
Table 27. ....................................................................................PHY Address Register (Per Port) [Register 19h]37
Table 28. Config 10 Register (Per Port) [Register 1Ah]......................................................................................... 37
Table 29. Status 100 Register (Per Port) [Register 1Bh] ....................................................................................... 38
相關PDF資料
PDF描述
LU3X34FT Quad 3 V 10/100 Ethernet Transceiver TX/FX(四3 V 10/100以太網(wǎng)收發(fā)器)
LU3X51FT-J80 Single-Port 3V 10/100 Ethernet TransceiverTX/FX(單端口3V 10/100以太網(wǎng)收發(fā)器)
LU3X54FTL Quad-FET for 10Base-T/100Base-TX/FX(應用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
LU5X31F Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器)
LUC4AB01 ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM))
相關代理商/技術參數(shù)
參數(shù)描述
LU3X34FTR 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX
LU3X34FTR-HS128-DB 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX
LU3X54FT 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX
LU3X54FTL 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX
LU3X54FTLHS208 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*