參數(shù)資料
型號: LU3X32FT
廠商: Lineage Power
英文描述: Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器)
中文描述: 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯(3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器)
文件頁數(shù): 16/54頁
文件大?。?/td> 626K
代理商: LU3X32FT
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
16
Lucent Technologies Inc.
Functional Description
(continued)
Symbol Encoder
. The symbol encoder converts 4-bit (4B) nibble data generated by the MAC into 5-bit (5B) sym-
bols for transmission. This conversion is required to allow control symbols to be combined with data symbols. Refer
to the table below for 4B to 5B symbol mapping.
Following onset of the TXEN signal, the 4B/5B symbol encoder replaces the first two nibbles of the preamble from
the MAC frame with a /J/K code-group pair (11000 10001) start-of-stream delimiter (SSD). The symbol encoder
then replaces subsequent 4B codes with corresponding 5B symbols. Following negation of the TXEN signal, the
encoder substitutes the first two IDLE symbol with a /T/R code-group pair (01101 00111) end-of-stream delimiter
(ESD) and then continuously injects IDLE symbols into the transmit data stream until the next transmit packet is
detected.
Assertion of the TXER input while the TXEN input is also asserted will cause the LU3X32FT to substitute HALT
code-groups for the 5B code derived from data present at TXD[3:0]. However, the SSD (/J/K) and ESD (/T/R) will
not be substituted with halt code-groups. As a result, the assertion of TXER while TXEN is asserted will result in a
frame properly encapsulated with the /J/K and /T/R delimiters which contains HALT code-groups in place of the
data code-groups.
The 100 Mbits/s symbol decoder translates all invalid code groups into 0Eh by default. In case the ACCEPT HALT
register is set (bit 5 of register 18h), the HALT code group (00100) is translated into 05h instead.
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