參數(shù)資料
型號： LU3X32FT
廠商： Lineage Power
英文描述： Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器)
中文描述： 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器）
文件頁數(shù)： 15/54頁
文件大小： 626K
代理商： LU3X32FT
Lucent Technologies Inc.
15
Preliminary Data Sheet
July 2000
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Functional Description
(continued)
100Base-X Module
The LU3X32FT implements a 100Base-X compliant PCS and PMA and 100Base-TX compliant TP-PMD for each
port as illustrated in Figure 3. Bypass options for each of the major functional blocks within the 100Base-X PCS
provide flexibility for various applications. 100 Mbits/s PHY loopback is included for diagnostic purposes.
5-7909(F).r2
Figure 3. 100Base-X Data Path (per port)
100Base-X Transmitter
The 100Base-X transmitter consists of functional blocks which convert synchronous 4-bit nibble data, as provided
by the MII, to a 125 Mbits/s serial data stream. This data stream may be routed either to the on-chip twisted-pair
PMD for 100Base-TX signaling, or to an external fiber-optic PMD for 100Base-FX applications. The LU3X32FT
implements the 100Base-X transmit state machines as specified in the IEEE802.3U standard, Clause 24 and
comprises the following functional blocks in its data path:
I
Symbol encoder
I
Scrambler block
I
Parallel/serial converter and NRZ/ NRZI encoder block
FOTX±
RXEN
RXDV
CRS
RXCLK
D
S
C
E
5B/4B
DECODE
BYP_4B5B
BYP_ALIGN
RECEIVE
STATE
RXD[3:0]
FORX±
FOSD±
TPRX±
100BASE-X RECEIVER
TXD[3:0]
COL
TXCLK
TXEN
TXER
P
S
BYP_SCR
BYP_ALIGN
MLT-3
STATE
MACHINE
10/100
TRANSMIT
PECL
DRIVER
TPTX±
100BASE-X TRANSMITTER
100M PHY
LOOPBACK
BYP_ SCR
TRANSMIT
STATE
4B/5B
ENCODE
BYP_4B5B
PATH
P
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