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參數(shù)資料
| 型號(hào)： | LU3X32FT |
| 廠商： | Lineage Power |
| 英文描述： | Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器) |
| 中文描述： | 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（3伏雙端口1000萬(wàn)位和100米位以太網(wǎng)收發(fā)器） |
| 文件頁(yè)數(shù)： | 31/54頁(yè) |
| 文件大小： | 626K |
| 代理商： | LU3X32FT |
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Lucent Technologies Inc.
31
Preliminary Data Sheet
July 2000
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Table 17. PHY Identifier (Per Port) [Register 2h]
Table 18. PHY Identifier (Per Port) [Register 3h]
4
Remote Fault
1—Remote fault detected.
0—Remote fault not detected.
This bit is latched to 1 if the RF bit in the autone-
gotiation link-partner ability register (bit 13, regis-
ter address 05h) is set or the receive channel
meets the far end fault indication function criteria.
It is unlatched when this register is read.
1—Capable of autonegotiation.
0—Not capable of autonegotiation.
This bit defaults to 1, indicating that LU3X32FT is
capable of autonegotiation.
1—Link is up.
0—Link is down.
This bit reflects the current state of the link-test-
fail state machine. Loss of a valid link causes a 0
latched into this bit. It remains 0 until this register
is read by the serial management interface.
1—Jabber condition detected.
0—Jabber condition not detected.
During 10Base-T operation, this bit indicates the
occurrence of a jabber condition. It is imple-
mented with a latching function so that it
becomes set until it is cleared by a read.
1—Extended register set.
0—No extended register set.
This bit defaults to 1, indicating that the
LU3X32FT implements extended registers.
RO, LH
0h
3
Autonegotiation Ability
RO
1h
2
Link Status
RO,
LL
0h
1
Jabber Detect
RO,
LH
0h
0
Extended Capability
RO
1h
Bit(s)
15:0
Name
Description
R/W
RO
Default
0043h
PHY-ID[15:0]
IEEE Address.
Bit(s)
15:10
Name
Description
R/W
RO
Default
7421h
PHY-ID[15:0]
IEEEAddress/Model No./ Rev. No.
This number may change in future revisions.
Bit(s)
Name
Description
R/W
Default
Register Description
(continued)
Table 16. Status Register Bit Definitions (Per Port) [Register 1h]
(continued)
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PDF描述 |
|---|---|
| LU3X34FT | Quad 3 V 10/100 Ethernet Transceiver TX/FX(四3 V 10/100以太網(wǎng)收發(fā)器) |
| LU3X51FT-J80 | Single-Port 3V 10/100 Ethernet TransceiverTX/FX(單端口3V 10/100以太網(wǎng)收發(fā)器) |
| LU3X54FTL | Quad-FET for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器) |
| LU5X31F | Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器) |
| LUC4AB01 | ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LU3X34FTR | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X34FTR-HS128-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208 | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208 |
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