參數(shù)資料
型號: LU3X32FT
廠商: Lineage Power
英文描述: Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器)
中文描述: 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯(3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器)
文件頁數(shù): 10/54頁
文件大?。?/td> 626K
代理商: LU3X32FT
LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
10
Lucent Technologies Inc.
Table 9. LED and Status Outputs
Pin No.
110, 57
Pin Name
LEDRX
/NDRPTR
[1:0]
I/O
I/O
Pin Description
Receive LED (Ports 1, 0)
. This output will drive a 10 mA
LED if the PHY is receiving data from the UTP cable.
Place a 10 k
resistor across the LED pins if setting to
nondefault mode, i.e., repeater mode. See Table 8 for
NDRPTR description.
Transmit LED or Activity LED (Ports 1, 0)
. When bit 7
of register 17h is 0, this output will drive a 10 mA LED if
the PHY is transmitting data; if the control bit is set, then
the LED will be driven whenever there is a receive or
transmit over the cable. Place a 10 k
resistor across
the LED pins if setting to nondefault mode, i.e., bypass
scrambler mode. See Table 6 for BPSCR description.
Link LED (Ports 1, 0)
. This output will drive a 10 mA
LED for as long as a valid link exists across the cable.
Place a 10 k
resistor across the LED pins if setting to
nondefault mode, i.e., bypass align mode. See Table 6
for BPALIGN description.
Speed Status (Ports 1, 0)
. This output can be used to
drive a 10 mA LED for as long as the PHY is in
100 Mbits/s mode. Place a 10 k
resistor across the
LED pins if setting to nondefault mode, i.e., 10FD dis-
able mode. See Table 7 for 10FDEN description.
Full-Duplex Status
. This output will drive a 10 mA LED
when the LU3X32FT is in full-duplex mode. Place a 10
k
resistor across the LED pins if setting to nondefault
mode, i.e., 10HD disable mode, as shown in Figure 5.
See Table 7 for 10HDEN and Table 8 for FEFI_EN
description.
Collision LED
. This output will drive a 10 mA LED
whenever the PHY senses a collision has occurred.
Place a 10 k
resistor across the LED pins if setting to
nondefault mode, i.e., bypass 4B/5B mode. See Table 6
for BP4B5B description.
111, 56
LEDTX/ACTLED
/
BPSCR
[1:0]
I/O
114, 53
LEDLNK
/BPALIGN
[1:0]
I/O
85, 82
LEDSP
/10FDEN
[1:0]
I/O
113, 54
LEDFD/
10HDEN/
FEFI_EN
[1:0]
I/O
112, 55
LEDCOL/
BP4B5B
[1:0]
I/O
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