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參數(shù)資料
| 型號： | LU3X32FT |
| 廠商： | Lineage Power |
| 英文描述： | Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器) |
| 中文描述： | 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 34/54頁 |
| 文件大?。?/td> | 626K |
| 代理商： | LU3X32FT |
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LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
34
Lucent Technologies Inc.
Register Description
(continued)
Table 24. Receive Error Counter (Per Port) [Register 15h]
Table 25. PHY Control/Status Register (Per Port) [Register 17h]
Bit(s)
15:0
Name
Description
R/W
RO,
COR
Default
0h
RX Error Count
Number of receive errors since last reset.
The counter is incremented once for each
packet that has receive error condition
detected. This counter may roll over
depending on value of the CSMODE bit
(bit 13 of register 17h).
Bit(s)
15
Name
NDRPTR
Description
R/W
RO
Default
Pin
1—Repeater mode.
0—Node mode.
This bit determines whether LU3X32FT is
operating as a node or a repeater. It is ini-
tialized to the logic level of NDRPTR pin at
powerup or reset.
1—Fiber mode.
0—TX mode.
For 100Base-X operation, this bit deter-
mines whether LU3X32FT interfaces with
the network through the internal 100Base-
TX transceiver or using external fiber-optic
transceiver. It is initialized to the logic level
of FOSEL pin at powerup or reset.
1—Counter sticks at FFFFh.
0—Counters roll over.
This bit controls the operation of isolate
counter, false carrier counter, and receive
error counters.
1—3-state transmit pairs.
0—Normal operation.
When this bit is set, the twisted-pair trans-
mitter outputs of all four ports are tri-
stated.
14
FOSEL
RO
Pin
13
CSMODE
R/W
0h
12
TPTXTR
R/W
Pin
11
ThunderLAN interrupt Enable 1—MDIO ThunderLANinterrupt enabled.
0—MDIO ThunderLANinterrupt disabled.
This bit enables/disables the
TI ThunderLAN interrupt mechanism.
MF Preamble Suppression
Enable
0—MDIO preamble suppression disabled.
LU3X32FT can accept management
frames without preamble as described in
bit 6 of register 1h. This bit allows the user
to enable or disable the preamble sup-
pression function.
Speed Status
1—Part is in 100 Mbits/s mode.
0—Part is in 10 Mbits/s mode.
This value is not defined during the auto-
negotiation period.
R/W
0h
10
1—MDIO preamble suppression enabled.
R/W
1h
9
RO
0h
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LU3X34FTR | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X34FTR-HS128-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208 | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208 |
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