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參數(shù)資料
| 型號： | LU3X32FT |
| 廠商： | Lineage Power |
| 英文描述： | Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器) |
| 中文描述： | 雙端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（3伏雙端口1000萬位和100米位以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 18/54頁 |
| 文件大小： | 626K |
| 代理商： | LU3X32FT |
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LU3X32FT Two-Port 3 V 10/100
Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
18
Lucent Technologies Inc.
Functional Description
(continued)
Scrambler Block
. For 100Base-TX applications, the scrambler is required to control the radiated emissions at the
media connector and on the twisted-pair cable.
The LU3X32FT implements a data scrambler as defined by the TP-PMD stream cipher function per port. The
scrambler uses an 11-bit ciphering linear feedback shift register (LFSR) with the following recursive linear function:
X[n] = X[n – 11] + X[n – 9] (modulo 2)
The output of the LFSR is combined with data from the encoder via an exclusive-OR logic function. By scrambling
the data, the total energy launched onto the cable is randomly distributed over a wide frequency range.
A seed value for the scrambler function can be loaded by setting bit 4 of register 18h. When this bit is set, the con-
tent of bits 10 through 0 of register 19h, that compose of the 5-bit PHY address and a 6-bit user seed, will be
loaded into the LFSR. By specifying unique seed value for each PHY in a system, the total EMI energy produced by
a repeater application can be reduced.
Parallel to Serial & NRZ-NRZI Conversion
. After the transmit data stream is scrambled, data is loaded into a shift
register and clocked out with a 125 MHz clock into a serial bit stream. The serialized data is further converted from
NRZ to NRZI format, which produces a transition on every logic 1 and no transition on logic 0.
Collision Detect
. During 100 Mbits/s half-duplex operation, collision condition is detected if the transmitter and
receiver become active simultaneously. Collision detection is indicated by the COL pin of the MII. For full-duplex
applications, the COL signal is never asserted. A collision test register exists at address 0
bit 7.
100Base-X Receiver
The 100Base-X receivers consist of functional blocks required to recover and condition the 125 Mbits/s receive
data stream. The LU3X32FT implements the 100Base-X receive state machine diagram as given in ANSI/IEEE
Standard 802.3u, Clause 24 for each port. The 125 Mbits/s receive data stream may originate from the on-chip
twisted-pair transceiver in a 100Base-TX application. Alternatively, the receive data stream may be generated by
an external optical receiver as in a 100Base-FX application.
Each receiver block consists of the following functional blocks:
I
Clock recovery module
I
NRZI/ NRZ and serial/parallel decoder
I
Descrambler
I
Symbol alignment block
I
Symbol decoder
I
Collision detect block
I
Carrier sense block
I
Stream decoder block
Clock Recovery
. The clock recovery module accepts 125 Mbits/s scrambled NRZI data stream from either the on-
chip 100Base-TX receiver or from an external 100Base-FX transceiver. The LU3X32FT uses an onboard digital
phase-locked loop (PLL) to extract clock information of the incoming NRZI data, which is then used to retime the
data stream and set data boundaries.
After power-on or reset, the PLL locks to a free-running 25 MHz clock derived from the external clock source. When
initial lock is achieved, the PLL switches to lock to the data stream, extracts a 125 MHz clock from the data, and
uses it for bit framing of the recovered data.
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| LU3X34FT | Quad 3 V 10/100 Ethernet Transceiver TX/FX(四3 V 10/100以太網(wǎng)收發(fā)器) |
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| LU3X54FTL | Quad-FET for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| LU3X34FTR | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X34FTR-HS128-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208 | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208 |
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