參數(shù)資料
型號： GM2121
廠商： Electronic Theatre Controls, Inc.
英文描述： SXGA LCD Monitor Controller with Integrated Analog Interface and Dual LVDS Transmitter
中文描述： SXGA液晶顯示器控制器集成模擬接口和雙路LVDS發(fā)送器
文件頁數(shù)： 41/51頁
文件大?。?/td> 489K
代理商： GM2121
gm2121 Preliminary Data Sheet
C2121-DAT-01F
41
December 2002
http://www.genesis-microchip.com
Table 16.
gm2121 GPIOs and Alternative Functions
Pin Number
Alternative function
23
24
25
26
Timer1 input of the OCM.
27
28
29
32
22
OCM external interrupt source (IRQINn).
33
34
35
Write enable for external ROM if programmable FLASH device is used.
36
37
configuration (section 4.14.1).
18
19
[Bi-directional Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
9
Serial data line for 2-wire host interface.
13
12
11
10
16
OCM interrupt output pin.
8
Serial input clock for 2-wire host interface.
88
89
92
93
94
95
96
97
Pin Name
GPIO0/PWM0
GPIO1/PWM1
GPIO2/PWM2
GPIO3/TIMER1
GPIO4/UART_DI
GPIO5/UARD_D0
GPIO6
GPIO7
GPIO8/IRQINn
GPIO9
GPIO10
GPIO11/ROM_WEn
GPIO12/NVRAM_SDA
GPIO13/NVRAM_SCL
GPIO14/DDC_SCL
GPIO15/DDC_SDA
GPIO16/HFSn
GPIO17/HDATA0
GPIO18/HDATA1
GPIO19/HDATA2
GPIO20/HDATA3
GPIO21/IRQn
GPIO22/HCLK
GPO 0
GPO 1
GPO 2
GPO 3
GPO 4
GPO 5
GPO 6
GPO 7
PWM0, PWM1 and PWM2 back light intensity controls, as described in section 4.17.2 below.
OCM UART data in/out signals respectively.
Data and clock lines for master 2-wire serial interface to NVRAM when gm2121 is used in standalone
General-purpose input/output signals. Open drain option via register setting.
4.15 Bootstrap Configuration Pins
During hardware reset, the external ROM address pins ROM_ADDR[15:0] are configured as inputs. On
the negating edge of RESETn, the value on these pins is latched and stored. This value is readable by the
on-chip microcontroller (or an external microcontroller via the host interface). Install a 10K pull-up
resistor to indicate a ‘1’, otherwise a ‘0’ is indicated because ROM_ADDR[15:0] have a 60K
internal
pull-down resistor.
Table 17.
Bootstrap Signals
Signal Name
Pin Name
Description
HOST_ADDR(6:0)
HOST_PROTOCOL
HOST_PORT_EN
ROM_ADDR(6:0)
ROM_ADDR7
ROM_ADDR8
If using 2-wire host protocol, these are the serial bus device address.
Program this bit to 0 for 2-wire host interface operation.
Program this bit to 0 for 2-wire host interface operation.
Note: For DDC2Bi operation on HCLK/HFSn (recommended) set to 0 (unconnected).
Determines the operating condition of the OCM after HW reset:
0 = OCM remains in reset until enabled by register bit.
1 = OCM becomes active after OCM_CLK is stable.
Selects the pin pair to be used for DDC2Bi communication for the standalone firmware (standalone
configuration is selected when bootstrap of ROM_ADDR14 = 0)
0 = GPIO14/DDC_SCL and GPIO15/DDC_SDA
1 = GPIO22/HCLK and GPIO16/HFSn
OCM_START
ROM_ADDR9
DDC_PORT_SEL
ROM_ADDR12
相關(guān)PDF資料
PDF描述
GM317 3- TERMINAL ADJUSTABLE REGULATOR
GM317TA3R 3- TERMINAL ADJUSTABLE REGULATOR
GM317TA3T 3- TERMINAL ADJUSTABLE REGULATOR
GM317TB3T 3- TERMINAL ADJUSTABLE REGULATOR
GM5060 GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GM2123 制造商:GTM 制造商全稱:GTM 功能描述:CMOS POSITIVE VOLTAGE REGULATOR
GM2125 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ANALOG INTER FACE XGA/SXGA ONPANEL LCD PANEL CONTROLLER
GM2126 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ANALOG INTERFACE ONPANEL SXGA LCD CONTROLLER WITH RSDS TRANSMITTER
GM215 制造商:GECKODRIVE 功能描述:CONTROLLER STEPPER MOTOR 13W 制造商:GECKODRIVE 功能描述:CONTROLLER, STEPPER MOTOR, 13W, No. of Phases:(Not Available), SVHC:No SVHC (20-
GM216 NJ BLACK 制造商:Hirschmann Electronics GmbH & Co Kg 功能描述:CONNECTOR SOLENOID
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*