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參數(shù)資料
| 型號(hào)： | GM2121 |
| 廠(chǎng)商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SXGA LCD Monitor Controller with Integrated Analog Interface and Dual LVDS Transmitter |
| 中文描述： | SXGA液晶顯示器控制器集成模擬接口和雙路LVDS發(fā)送器 |
| 文件頁(yè)數(shù)： | 18/51頁(yè) |
| 文件大小： | 489K |
| 代理商： | GM2121 |
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gm2121 Preliminary Data Sheet
minimum signal level of about 50-mV peak to peak to function correctly. The output of the comparator is
buffered and then distributed to the gm2121 circuits.
C2121-DAT-01F
18
December 2002
http://www.genesis-microchip.com
~ 2 Volts
3.3 Volts
250 mV peak to peak
to
1000 mV peak to peak
time
Figure 5.
Internal Oscillator Output
One of the design parameters that must be given some consideration is the value of the loading capacitors
used with the crystal as shown in Figure 6. The loading capacitance (C
load
) on the crystal is the
combination of C
L1
and C
L2
and is calculated by C
load
= ((C
L1
* C
L2
) / (C
L1
+ C
L2
)) + C
shunt
. The shunt
capacitance C
shunt
is the effective capacitance between the XTAL and TCLK pins. For the gm2121 this is
approximately 9 pF. C
L1
and C
L2
are a parallel combination of the external loading capacitors (C
ex
), the
PCB board capacitance (C
pcb
), the pin capacitance (C
pin
), the pad capacitance (C
pad
), and the ESD
protection capacitance (C
esd
). The capacitances are symmetrical so that C
L1
= C
L2
= C
ex
+ C
PCB
+ C
pin
+
C
pad
+ C
ESD
. The correct value of C
ex
must be calculated based on the values of the load capacitances.
Approximate values are provided in Figure 6.
XTAL
TCLK
gm2121
102
103
Cex1
Cex2
Internal Oscillator
Cpcb
Cshunt
Cpcb
Cpin
Cpad
Cesd
Cpin
Cpad
Cesd
Vdda
Vdda
CL1 = Cex1 + Cpcb + Cpin + Cpad + Cesd
CL2 = Cex1 + Cpcb + Cpin + Cpad + Cesd
Approximate values:
C
PCB
~ 2 pF to 10 pF (layout dependent)
C
pin
~ 1.1 pF
C
pad
~ 1 pF
C
esd
~ 5.3 pF
C
shunt
~ 9 pF
Figure 6.
Sources of Parasitic Capacitance
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