參數(shù)資料
型號: GM2121
廠商: Electronic Theatre Controls, Inc.
英文描述: SXGA LCD Monitor Controller with Integrated Analog Interface and Dual LVDS Transmitter
中文描述: SXGA液晶顯示器控制器集成模擬接口和雙路LVDS發(fā)送器
文件頁數(shù): 15/51頁
文件大?。?/td> 489K
代理商: GM2121
gm2121 Preliminary Data Sheet
C2121-DAT-01F
15
December 2002
http://www.genesis-microchip.com
Table 9.
I/O Power and Ground Pins
Pin Name
No I/O Description
RVDD_3.3
14
30
90
143
157
15
21
31
42
44
78
91
99
137
144
158
20
43
79
98
138
P
P
P
P
P
G
G
G
G
G
G
G
G
G
G
G
P
P
P
P
P
Connect to 3.3V digital supply.
Must be bypassed with a 0.1uF capacitor to CRVSS (as close to the pin as possible).
CRVSS
Connect to digital ground.
CVDD_2.5
Connect to 2.5V digital supply.
Must be bypassed with a 0.1uF capacitor to CRVSS (as close to the pin as possible).
Note, “AP” indicates a power supply that is analog in nature and does not have large switching currents.
These should be isolated from other digital supplies that do have large switching currents.
Table 10.
Power and Ground Pins for LVDS Transmitter
Pin Name
No I/O Description
AVDD_OUT_LV_E_
2.5
AVDD_LV_E_2.5
AVSS_OUT_LV_E
46
59
61
47
58
60
AP
Analog power for on-chip LVDS output buffer. Connect to 2.5V supply.
Analog power for on-chip LVDS transmitter. Connect to 2.5V supply
Analog ground for on-chip LVDS output buffer.
Must be directly connected to the system ground plane
Analog ground for on-chip LVDS transmitter.
Must be directly connected to the system ground plane
Analog power for on-chip LVDS output buffer. Connect to 2.5V supply.
Analog power for on-chip LVDS transmitter. Connect to 2.5V supply.
Analog ground for on-chip LVDS output buffer.
Must be directly connected to the system ground plane.
Analog ground for on-chip LVDS transmitter.
Must be directly connected to the system ground plane.
AP
G
AVSS_LV_E
G
AVDD_OUT_LV_O_
2.5
AVDD_LV_O_2.5
63
74
77
AP
AP
AVSS_OUT_LV_O
62
75
76
G
AVSS_LV_O
G
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