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| 型號： | EVAL-ADAU1446EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 57/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADAU1446 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SigmaDSP® |
| 主要目的： | 音頻，音頻處理 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | ADAU1446 |
| 主要屬性： | 單芯片多通道 28/56 位音頻 DSP |
| 次要屬性： | I²C & SPI 接口 |
| 已供物品： | 板，軟件 |
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ADAU1445/ADAU1446
Rev. A | Page 60 of 92
RELIABILITY FEATURES
The ADAU1445/ADAU1446 contain several subsystems designed
to increase the reliability of the system in which they are used.
When these functions are used in conjunction with an external
host controller device, the DSP can recover from serious errors,
such as memory corruption or a program counter crash.
CRC Modes and Settings
Cyclic Redundancy Check (CRC) Registers
(Address 0xE200 to Address 0xE202)
Table 40. Register Details of CRC Registers
Address
Register
Function
Default
Decimal
Hex
57856
E200
CRC Ideal
Value 1
16 MSBs of the
CRC hash sum
0
57857
E201
CRC Ideal
Value 2
16 LSBs of the CRC
hash sum
0
57858
E202
CRC enable
1-bit CRC enable,
active high
0
The CRC constantly checks the validity of the program RAM
contents. SigmaStudio generates a 32-bit hash sum when a
program is compiled that must be written to two consecutive
16-bit register locations. The CRC must then be enabled. Every
4096 frames (88 ms when fS,NORMAL is 48 kHz), the IC generates
its own 32-bit code and compares it with the one stored in these
registers. If they do not match, an MP pin is set high (CRC
flag). This output flag must be enabled using the output CRC
error sticky command in the multipurpose pin control register
Address 0xE20F) section).
The user turns this enable on when continuous CRC checking is
desired. This defaults to off and can be set high after the user
has loaded a program and sent the correct CRC, calculated by
SigmaStudio. If there is an error, it can be cleared by setting the
enable bit low, fixing the error (presumably by reloading the
program) and then setting it high again.
The CRC control registers are configured as follows:
CRC Ideal Value 1 is the 16 MSBs of the CRC code.
CRC Ideal Value 2 is the 16 LSBs of the CRC code.
CRC enable is a 1-bit enable.
The CRC error sticky register is a single-bit read-only register at
Address 57893 (Address 0xE225) that acts as the CRC error
flag. It can optionally be sent to an MP pin. For example, it can
connect to an interrupt pin on an external microcontroller,
which triggers a rewrite of the corrupted memory. The register
is reset when the CRC enable register goes low.
CRC Error Sticky Register (Address 0xE225)
Table 41. Bit Description of Register 0xE225
Bit Position
Description
Default
[15:1]
Reserved
[0]
CRC error sticky (read only)
0
This single-bit read-only register goes high when there is a CRC
error. It is reset to 0 when the CRC enable is reset to 0.
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