
June 1997
139
ADVANCE DATA BOOK v2.0
VIDEO MACROCELL INTERFACE
CL-PS7500FE
System-on-a-Chip for Internet Appliance
For
Equation 15-1
, let:
n
is the value programmed into the control register
v
(words/
μ
s) is the rate the video data is displayed
Lmax
(
μ
s) is the maximum latency in the memory system (this is the maximum time between the CL-PS7500FE requesting
more video data and the memory system delivering the first word of that data)
If the FIFO is almost empty, it takes 0.025
μ
s for a word of data to reach the bottom of the FIFO before it
can be used. The minimum value for nis deduced from the following condition to avoid the FIFO under-
flowing: There are four nwords in the FIFO when the FIFO requests more data and, if not refilled, the
FIFO is empty in 4n/v
μ
s. Therefore, nmust be set as in
Equation 15-1
.
4
n
/v > (
Lmax
+ 0.025)
Equation 15-1
The maximum value for nis deduced from the following condition to avoid the FIFO overflowing: ncan
have a maximum value of 7 and the FIFO can never overflow as there are always 4 words available in the
top of the FIFO, even if the video request is serviced immediately.
15.2.1 Example
For the CL-PS7500FE, the value of v(words/
μ
s) changes depending on the video mode and the pixel
clock rate selected. In the worst-case DMA latency, Lmaxalters depending on if ROM, DRAM accesses,
or internal programming bursts are slowest, and the MEMCLK frequency used.
Chapter 9
discusses how to calculate worst-case DMA latencies for a particular system using the
CL-PS7500FE. The value calculated should be imported as Lmaxinto
Equation 15-2
.
Assume an 8-bpp mode with a pixel clock rate of 60 MHz (period = 16.7 ns). In each pixel clock tick, 1
/
4
of a word is used – in a whole
μ
s, 0.25
×
1
÷
0.0167 = 14.9 words are required.
Hence the value of nmust be:
4
n/
v > (
Lmax
+ 0.025)
Equation 15-2
So, assuming an Lmaxvalue of 1.0
μ
s:
n
> 3.74
×
(1.0 + 0.025)
≥
n
> 3.83
Equation 15-3
So in this case the minimum value for nto prevent FIFO underflow is four.