
Technical Data
MC68HC11E Family
—
Rev. 4
92
Operating Modes and On-Chip Memory
MOTOROLA
Operating Modes and On-Chip Memory
CME
—
Clock Monitor Enable Bit
Refer to
Section 5. Resets and Interrupts
.
Bit 2
—
Not implemented
Always reads 0
CR[1:0]
—
COP Timer Rate Select Bits
The internal E clock is divided by 2
15
before it enters the COP
watchdog system. These control bits determine a scaling factor for
the watchdog timer. Refer to
Section 5. Resets and Interrupts
.
4.5 EPROM/OTPROM
Certain devices in the M68HC11 E series include on-chip
EPROM/OTPROM. For instance:
The MC68HC711E9 devices contain 12 Kbytes of on-chip
EPROM (OTPROM in non-windowed package).
The MC68HC711E20 has 20 Kbytes of EPROM (OTPROM in
non-windowed package).
The MC68HC711E32 has 32 Kbytes of EPROM (OTPROM in
non-windowed package).
Standard MC68HC71E9 and MC68HC711E20 devices are shipped with
the EPROM/OTPROM contents erased (all 1s). The programming
operation programs 0s. Windowed devices must be erased using a
suitable ultraviolet light source before reprogramming. Depending on the
light source, erasing can take from 15 to 45 minutes.
Using the on-chip EPROM/OTPROM programming feature requires an
external 12-volt nominal power supply (V
PPE
). Normal programming is
accomplished using the EPROM/OTPROM programming register
(PPROG).
PPROG is the combined EPROM/OTPROM and EEPROM
programming register on all devices with EPROM/OTPROM except the
MC68HC711E20. For the MC68HC711E20, there is a separate register
for EPROM/OTPROM programming called the EPROG register.