
Technical Data
MC68HC11E Family
—
Rev. 4
78
Operating Modes and On-Chip Memory
MOTOROLA
Operating Modes and On-Chip Memory
$102F
Serial Communications Data
Register (SCDR)
See page 152.
Read:
R7/T7
R6/T6
R5/T5
R4/T4
R3/T3
R2/T2
R1/T1
R0/T0
Write:
Reset:
Indetermnate after reset
$1030
Analog-to-Digital Control
Status Register (ADCTL)
See page 218.
Read:
CCF
SCAN
MULT
CD
CC
CB
CA
Write:
Reset:
0
0
Indetermnate after reset
$1031
Analog-to-Digital Results
Register 1 (ADR1)
See page 220.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indetermnate after reset
$1032
Analog-to-Digital Results
Register 2 (ADR2)
See page 220.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indetermnate after reset
$1033
Analog-to-Digital Results
Register 3 (ADR3)
See page 220.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indetermnate after reset
$1034
Analog-to-Digital Results
Register 4 (ADR4)
See page 220.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indetermnate after reset
$1035
Block Protect Register
(BPROT)
See page 99.
Read:
PTCON
BPRT3
BPRT2
BPRT1
BPRT0
Write:
Reset:
0
0
0
1
1
1
1
1
$1036
EPROMProgrammng Control
Register (EPROG)
(1
)
See page 101.
Read:
MBE
ELAT
EXCOL
EXROW
T1
T0
PGM
Write:
Reset:
0
0
0
0
0
0
0
0
$1037
Reserved
R
R
R
R
R
R
R
R
1. MC68HC711E20 only
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
I = Indetermnate after reset
Figure 4-7. Register and Control Bit Assignments (Sheet 7 of 8)