
Technical Data
MC68HC11E Family
—
Rev. 4
240
Electrical Characteristics
MOTOROLA
Electrical Characteristics
11.14 Analog-to-Digital Converter Characteristics
Characteristic
(1)
1. V
DD
= 5.0 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H,
750 kHz
≤
E
≤
3.0 MHz, unless otherwise noted
2. Source impedances greater than 10 k
affect accuracy adversely because of input leakage.
3. Performance verified down to 2.5 V
V
R
, but accuracy is tested and guaranteed at
V
R
= 5 V
±
10%.
Parameter
(2)
Min
Absolute
2.0 MHz 3.0 MHz
Max
—
Unit
Max
—
Resolution
Number of bits resolved by A/D converter
Maximum deviation from the ideal A/D
transfer characteristics
Difference between the output of an ideal and
an actual for 0 input voltage
Difference between the output of an ideal and
an actual A/D for full-scale input voltage
Maximum sum of non-linearity, zero error, and
full-scale error
—
8
Bits
Non-linearity
—
—
±
1/2
±
1
LSB
Zero error
—
—
±
1/2
±
1
LSB
Full scale error
—
—
±
1/2
±
1
LSB
Total unadjusted
error
Quantization
error
—
—
±
1/2
±
1/2
LSB
Uncertainty because of converter resolution
—
—
±
1/2
±
1/2
LSB
Absolute
accuracy
Difference between the actual input voltage
and the full-scale weighted equivalent of the
binary output code, all error sources
included
—
—
±
1
±
2
LSB
Conversion
range
V
RH
V
RL
V
R
Analog input voltage range
V
RL
—
V
RH
V
RH
V
Maximum analog reference voltage
(3)
Minimum analog reference voltage
(2)
Minimum difference between V
RH
and V
RL(2)
Total time to perform a single A/D conversion:
E clock
Internal RC oscillator
Conversion result never decreases with an
increase in input voltage; has no missing
codes
V
RL
—
V
DD
+0.1 V
DD
+0.1
V
RH
V
V
SS
–
0.1
—
V
RH
V
3
—
—
—
V
Conversion
time
—
—
32
—
—
t
cyc
+32
—
t
cyc
+32
t
cyc
μ
s
Monotonicity
—
Guaranteed
—
—
—
Zero input
reading
Full scale
reading
Sample
acquisition
time
Sample/hold
capacitance
Conversion result when V
In
= V
RL
00
—
—
—
Hex
Conversion result when V
In
= V
RH
—
—
FF
FF
Hex
Analog input acquisition sampling time:
E clock
Internal RC oscillator
Input capacitance during sample
PE[7:0]
Input leakage on A/D pins
PE[7:0]
V
RL
, V
RH
—
—
12
—
—
12
—
12
t
cyc
μ
s
—
20 typical
—
—
pF
Input leakage
—
—
—
—
400
1.0
400
1.0
nA
μ
A